Merge branch 'master' of...

Merge branch 'master' of atreus.informatik.uni-tuebingen.de:advanced_computer_architecture/exercises

aufgaben/blatt01/blatt01.md

@@ -64,7 +64,9 @@ Schreiben Sie ein Programm das  ```Hello World!``` ausgibt in C und kompilieren
 
     arm-linux-gnueabihf-gcc -static -O3 hello.c  -o hello.elf
 
-Führen Sie dieses im gem5-Simulator aus. Verwenden Sie dafür die bereitgestellte Konfigurationsdatei se.py
+Führen Sie dieses im gem5-Simulator aus. Verwenden Sie dafür die bereitgestellte Konfigurationsdatei se.py .
+```${GEM5_ROOT}``` bezeichnet dabei das Verzeichnis in das gem5 installiert wurde. In der bereitgestellten VM ist dies 
+```/home/vagrant/parallel_computer_architecture/gem5``` .
 
     $(GEM5_ROOT)/build/ARM/gem5.opt $(GEM5_ROOT)/configs/example/se.py -c hello.elf
 
@@ -221,7 +223,7 @@ Eine Datei ```simple_cache.py``` die ein Programm ```./hello.elf``` auf der ange
 
 ## Aufgabe 4: CPU-Typen und Ausführungszeiten
 
-Der GEM5 Simulator enthält verschieden Modelle für CPU-Architekturen. 
+Der GEM5 Simulator enthält verschieden Modelle für CPU-Architekturen. In dieser Aufgabe sollen die Modelle ```DerivO3CPU```, ```MinorCPU``` und  ```TimingSimpleCPU``` verglichen werden. 
 
 Erstellen Sie basierend auf ```simple_cache.py``` eine Konfiguration bei der Sich das simulierte Programm und das simulierte 
 CPU-Modell mit Hilfe eines Kommandozeilenschalters auswählen lässt. Die sonstige Systemkonfiguration soll wie in der vorhergehenden Aufgabe sein. 

aufgaben/blatt02/exec/Makefile

 
 all:
-	arm-linux-gnueabihf-gcc -static daxpy.c -o daxpy
+	arm-linux-gnueabihf-gcc -static -O3 daxpy.c -o daxpy
+
+o1:
+	arm-linux-gnueabihf-gcc -static -O1 daxpy.c -o daxpy	
 
 clean:
-	rm daxpy
+	rm daxpy daxpy.s

aufgaben/blatt02/exec/Makefile~

-FILE1 = basicmath_small.c   rad2deg.c  cubic.c   isqrt.c
-FILE2 = basicmath_large.c   rad2deg.c  cubic.c   isqrt.c
-
-all: basicmath_small basicmath_large
-
-basicmath_small: ${FILE1} Makefile
-	arm-linux-gnueabihf-gcc -static -O3 ${FILE1} -o basicmath_small -lm
-basicmath_large: ${FILE2} Makefile
-	arm-linux-gnueabihf-gcc -static -O3 ${FILE2} -o basicmath_large -lm
-
-clean:
-	rm -rf basicmath_small basicmath_large output*

aufgaben/blatt02/exec/daxpy.c

-#include<stdio.h>
-#define N 8  // size of vector
-#define R 10 // number of repetitions
+/* #include<stdio.h> */
+#define N 1000 // size of vector
+#define R 1 // number of repetitions
 
 
 // daxpy: Y = aX + Y (n size vector, a constant, X,Y vectors)
-void daxpy(double* x, double* y, double a, int n)
+void daxpy(int* x, int* y, int a, int n)
 {
   int i;
   for (i = 0; i < n; i++) {
@@ -13,32 +13,32 @@ void daxpy(double* x, double* y, double a, int n)
 }
 
 // pretty print vector
-void print_vector(double* vec, int n)
-{
-  int i;
-  for (i=0; i<n-1; i++) {
-    printf("%f,\t",vec[i]);
-  }
-  printf("%f",vec[n-1]);
-  printf("\n");
-}
+/* void print_vector(double* vec, int n) */
+/* { */
+/*   int i; */
+/*   for (i=0; i<n-1; i++) { */
+/*     printf("%f,\t",vec[i]); */
+/*   } */
+/*   printf("%f",vec[n-1]); */
+/*   printf("\n"); */
+/* } */
 
 void main()
 {
-  static double x[N], y[N];
-  double a = 5.5;
+  static int x[N], y[N];
+  int a = 5;
   int i;
   
   for (i = 0; i<N; i++) {
-    x[i] = 7.833667;
+    x[i] = 7+i;
     y[i] = 0;
   }
 
-  print_vector(y, N);
+  /* print_vector(y, N); */
 
   for (i = 0; i<R; i++) {
     daxpy(x,y,a,N);
   }
 
-  print_vector(y,N);
+  /* print_vector(y,N); */
 }

aufgaben/blatt02/exec/daxpy_float.c

+/* #include<stdio.h> */
+#define N 1000 // size of vector
+#define R 1 // number of repetitions
+
+
+// daxpy: Y = aX + Y (n size vector, a constant, X,Y vectors)
+void daxpy(double* x, double* y, double a, int n)
+{
+  int i;
+  for (i = 0; i < n; i++) {
+    y[i] = a * x[i] + y[i];
+  }
+}
+
+// pretty print vector
+/* void print_vector(double* vec, int n) */
+/* { */
+/*   int i; */
+/*   for (i=0; i<n-1; i++) { */
+/*     printf("%f,\t",vec[i]); */
+/*   } */
+/*   printf("%f",vec[n-1]); */
+/*   printf("\n"); */
+/* } */
+
+void main()
+{
+  static double x[N], y[N];
+  double a = 5.5;
+  int i;
+  
+  for (i = 0; i<N; i++) {
+    x[i] = 7.833667+i;
+    y[i] = 0;
+  }
+
+  /* print_vector(y, N); */
+
+  for (i = 0; i<R; i++) {
+    daxpy(x,y,a,N);
+  }
+
+  /* print_vector(y,N); */
+}

news/errata01.md

+Title: Korrektur Blatt 1
+Date: 26.04.2016
+
+Die in Aufgabe 4 zu untersuchenden CPUs sind:
+```DerivO3CPU```, ```MinorCPU``` und  ```TimingSimpleCPU```.
+

news/ue01.md

+Title: Notizen Übungsgruppe 1
+Date: 22.04.2015 
+
+## Aufgabe 1/ Einrichten der VM
+* VM importieren
+* Zugriff per ssh (Port-forwarding)
+
+## Aufgabe 2/ Erstes Ausführen
+* Hello World schreiben
+
+		#include <stdio.h>
+		void main (void)
+		{
+			printf("hallo\n");
+		}
+* Kompilieren
+
+		$ arm-linux-gnueabihf-gcc --static hello_world.c -o hello.elf
+
+* Ausführen:
+
+		$ build/ARM/gem5.opt configs/example/se.py -c ~/hello/hello.elf
+
+* Ordner m5out enthält Ausgaben
+
+## full-system mode
+* image starten
+
+		$ build/ARM/gem5.opt configs/example/fs.py --disk-image /home/vagrant/parallel_computer_architecture/system/disks/linux-aarch32-ael.img
+
+* connecten mit
+
+		$ ~/parallel_computer_architecture/gem5/util/term/m5term localhost 3456	
+
+### image mounten
+
+		$ cd /home/vagrant/parallel_computer_architecture/system/disks
+		$ mkdir imgmount
+		$ sudo mount -o loop,offset=32256 linux-aarch32-ael.img imgmount/
+		$ sudo cp ~/hello/hello.elf ./
+		$ sudo umount imgmount/
+
+### checkpointing
+* checkpoint erstellen mit
+
+		$ m5 checkpoint
+
+* ab checkpoint weiter ausführen mit
+
+		$ build/ARM/gem5.opt configs/example/fs.py --disk-image /home/vagrant/parallel_computer_architecture/system/disks/linux-aarch32-ael.img -r 1

pages/index.md

@@ -4,6 +4,8 @@ title: Start
 
 # Übungen: Parallele Rechnerarchitekturen Sommersemester 2016
 
+The EInführungsfolien zum simulator finden Sie [hier](static/An_introduction_to_gem5.slides.html) 
+
 ## Abgabe 
 
 ## Übersicht

pelicanconf.py

@@ -8,7 +8,7 @@ SITEURL = 'https://atreus.informatik.uni-tuebingen.de/~gerum/ra/pra/ss16/'
 
 PAGE_PATHS=['aufgaben', 'pages']
 ARTICLE_PATHS=['news']
-STATIC_PATHS=['aufgaben']
+STATIC_PATHS=['static', 'aufgaben', 'pages']
  
 
 TIMEZONE = 'Europe/Berlin'

static/An_introduction_to_gem5.ipynb

+{
+ "cells": [
+  {
+   "cell_type": "markdown",
+   "metadata": {
+    "slideshow": {
+     "slide_type": "slide"
+    }
+   },
+   "source": [
+    "# An introduction to gem5"
+   ]
+  },
+  {
+   "cell_type": "markdown",
+   "metadata": {
+    "slideshow": {
+     "slide_type": "slide"
+    }
+   },
+   "source": [
+    "# Introduction to gem5\n",
+    "\n",
+    "- Welcome to the redesigned exercises.\n",
+    "  - Give feedback wether you like this\n",
+    "\n",
+    "- Goals\n",
+    "  - Strengthen understanding of the Lectures\n",
+    "  - Provide some tools for state of the art CA research\n",
+    "  \n",
+    "- Focus on gem5\n",
+    "  - most widely used Simulator in CA-Research\n",
+    "  - Lot's of Publications\n",
+    "  \n",
+    "- Exercise sessions are for you\n",
+    "  - Please participate and ask questions"
+   ]
+  },
+  {
+   "cell_type": "markdown",
+   "metadata": {
+    "slideshow": {
+     "slide_type": "slide"
+    }
+   },
+   "source": [
+    "# gem5 Developers\n",
+    "\n",
+    "\n",
+    "Developed by a wide Range of Industrial and Academic Institutions\n",
+    "\n",
+    "![Developers](figures/gem5_developers.png)"
+   ]
+  },
+  {
+   "cell_type": "markdown",
+   "metadata": {
+    "slideshow": {
+     "slide_type": "slide"
+    }
+   },
+   "source": [
+    " # gem5 Basics\n",
+    " \n",
+    " 1. gem5's components can be rearranged, parameterized, extended or replaced easily to suit your needs.\n",
+    " 2. It simulates the passing of time as a series of discrete events.\n",
+    " 3. Its intended use is to simulate one or more computer systems in various ways.\n",
+    " 4. It's more than just a simulator; it's a simulator platform that lets you use as many of its premade components as you want to build up your own simulation system."
+   ]
+  },
+  {
+   "cell_type": "markdown",
+   "metadata": {
+    "slideshow": {
+     "slide_type": "slide"
+    }
+   },
+   "source": [
+    "# Other SImulators\n",
+    "\n",
+    "\n",
+    "| Simulator    |  Accuracy      | Supported processor architectures | License | Development Activity |\n",
+    "|--------------|----------------|-----------------------------------|---------|----------------------|\n",
+    "| Simics       | Functionally accurate  | Alpha, ARM, MIPS, PowerPC,  SPARC and x86         | Private | Yes                  |             \n",
+    "| qemu         | Functionally accurate | x86, PowerPC, ARM, Sparc, MicroBlaze, Mico32 and others | Open | Yes | \n",
+    "| PTLsim       | Cycle accurate | x86                               | Open    | Yes                  |\n",
+    "| SimpleScalar | Cycle accurate | Alpha, ARM, PowerPC and x86       | Open    | No                   |\n",
+    "| OVPsim       | Instruction accurate    | Open RISC, ARM, ARC, MIPS, PowerPC, MicroBlaze and others       | Private | Yes                  |\n",
+    "| GEM5         | Cycle accurate | Alpha, ARM, x86, SPARC, PowerPC and MIPS   | Open    | Yes                  | \n"
+   ]
+  },
+  {
+   "cell_type": "markdown",
+   "metadata": {
+    "slideshow": {
+     "slide_type": "slide"
+    }
+   },
+   "source": [
+    "# gem5 Features\n",
+    "\n",
+    "- Configurable CPU models\n",
+    "  - Simple one-IPC (SimpleAtomic/Timing)\n",
+    "  - Detailed in-order execution (InOrder)\n",
+    "  - Detailed out-of-order execution (O3)\n",
+    "\n",
+    "- Pluggable memory system \n",
+    "  - Stitch memory system together out of components\n",
+    "\n",
+    "- Device Models\n",
+    "  - Enough device models to boot Linux\n",
+    "\n",
+    "- Many ISAs"
+   ]
+  },
+  {
+   "cell_type": "markdown",
+   "metadata": {
+    "slideshow": {
+     "slide_type": "slide"
+    }
+   },
+   "source": [
+    "# gem5 abstraction levels\n",
+    "\n",
+    "![gem5 abstraction](figures/gem5_abstractions.png)"
+   ]
+  },
+  {
+   "cell_type": "markdown",
+   "metadata": {
+    "slideshow": {
+     "slide_type": "slide"
+    }
+   },
+   "source": [
+    "# Building gem5"
+   ]
+  },
+  {
+   "cell_type": "markdown",
+   "metadata": {
+    "slideshow": {
+     "slide_type": "slide"
+    }
+   },
+   "source": [
+    "# Building gem5\n",
+    "\n",
+    "- Recommended virtual  machine images with gem5 preinstalled\n",
+    "\n",
+    "- Should build on 64 Bit Linux, MacOSX, FreeBSD\n",
+    "\n",
+    "- For  details Exercise Sheet 01 \n",
+    "\n",
+    "\n",
+    "\n"
+   ]
+  },
+  {
+   "cell_type": "markdown",
+   "metadata": {
+    "slideshow": {
+     "slide_type": "slide"
+    }
+   },
+   "source": [
+    "# Building gem5\n",
+    "\n",
+    "-  ```build/<isa>/<binary>```\n",
+    "\n",
+    "- ISAs: \n",
+    "  - ARM, ALPHA, MIPS, SPARC, POWER, X86\n",
+    "\n",
+    "We use **ARM**  \n",
+    "\n",
+    "- Binaries\n",
+    "   - gem5.debug  debug build, symbols, tracing, assert\n",
+    "   - gem5.opt    optimized build, symbols, tracing, assert\n",
+    "   - gem5.fast   optimized build, no debugging, no symbols, no tracing, no assertions\n",
+    "   - gem5.prof   gem5.fast + profiling support\n",
+    "   \n",
+    "We use **gem5.opt**\n",
+    "\n"
+   ]
+  },
+  {
+   "cell_type": "markdown",
+   "metadata": {
+    "slideshow": {
+     "slide_type": "slide"
+    }
+   },
+   "source": [
+    "# gem5 simulation modes"
+   ]
+  },
+  {
+   "cell_type": "markdown",
+   "metadata": {
+    "slideshow": {
+     "slide_type": "slide"
+    }
+   },
+   "source": [
+    "# gem5 simulation modes\n",
+    "\n",
+    "- Full system (FS)\n",
+    "  - For booting operating systems\n",
+    "  - Models bare hardware, including devices \n",
+    "  - Interrupts, exceptions, privileged instructions, fault handlers\n",
+    "  - Simulated UART output \n",
+    "  - Simulated frame buffer output\n",
+    "  - complex to configure\n",
+    "\n",
+    "- Syscall emulation (SE)\n",
+    "  - For running individual applications, or set of applications on MP\n",
+    "  - Models user-visible ISA plus common system calls\n",
+    "  - System calls emulated, typically by calling host OS\n",
+    "  - Simplified address translation model, no scheduling\n",
+    "  - syscall emulation mode\n",
+    " "
+   ]
+  },
+  {
+   "cell_type": "markdown",
+   "metadata": {
+    "slideshow": {
+     "slide_type": "slide"
+    }
+   },
+   "source": [
+    "# Sample Syscall emulation Mode"
+   ]
+  },
+  {
+   "cell_type": "markdown",
+   "metadata": {
+    "slideshow": {
+     "slide_type": "slide"
+    }
+   },
+   "source": [
+    "# Sample Full system ode"
+   ]
+  },
+  {
+   "cell_type": "markdown",
+   "metadata": {
+    "slideshow": {
+     "slide_type": "slide"
+    }
+   },
+   "source": [
+    "# Full systme mode\n",
+    "![Syscall Emulation](figures/gem5_fs.png)"
+   ]
+  },
+  {
+   "cell_type": "markdown",
+   "metadata": {
+    "slideshow": {
+     "slide_type": "slide"
+    }
+   },
+   "source": [
+    "# gem5 simulation architecture\n",
+    "\n",
+    "\n",
+    "![gem5 architecture](figures/gem5_architecture.svg)"
+   ]
+  },
+  {
+   "cell_type": "markdown",
+   "metadata": {
+    "slideshow": {
+     "slide_type": "slide"
+    }
+   },
+   "source": [
+    "# SimObjects\n",
+    "\n",
+    "- Everything you care about is an object (C++/Python)\n",
+    "  - Assembled using Python, simulated using C++\n",
+    "  - Derived from ```SimObject``` base class\n",
+    "  - Common code for creation, configuration parameters, naming, checkpointing, etc.\n",
+    "\n",
+    "- Uniform method-based APIs for object types\n",
+    "  - CPUs, caches, memory, etc.\n",
+    "\n",
+    "- Easy reuse of system components\n",
+    "  - Functional vs. detailed CPU\n",
+    "  - Conventional vs. indirect-index cache\n",
+    "  \n",
+    "- Easy replication: cores, multiple systems\n",
+    "\n",
+    "- ```MemObjects``` are special kinds of ```SimObjects``` that can be connect using ports "
+   ]
+  },
+  {
+   "cell_type": "markdown",
+   "metadata": {
+    "slideshow": {
+     "slide_type": "slide"
+    }
+   },
+   "source": [
+    "# Ports / MemObjects\n",
+    "\n",
+    "\n",
+    "- Used for connecting MemObjects together\n",
+    "  - e.g. enable a CPU to issue reads/writes to a memory\n",
+    "\n",
+    "- Correspond to real structural ports on system components\n",
+    "  - e.g. CPU has an instruction and a data port\n",
+    "\n",
+    "- Ports have distinct roles, and always appear in pairs\n",
+    " \n",
+    " \n",
+    "- A MasterPort is connected to a SlavePort\n",
+    "  - Send and receive function pairs transport packets\n",
+    "\n",
+    "- Quite Similar to TLM-2 initiator and target socket () \n",
+    "\n",
+    "\n",
+    "![gem5 ports](figures/gem5_ports.png)\n",
+    " \n"
+   ]
+  },
+  {
+   "cell_type": "markdown",
+   "metadata": {
+    "slideshow": {
+     "slide_type": "slide"
+    }
+   },
+   "source": [
+    "# Full System Simulation"
+   ]
+  },
+  {
+   "cell_type": "markdown",
+   "metadata": {},
+   "source": [
+    "# Full System Simulation "
+   ]
+  },
+  {
+   "cell_type": "markdown",
+   "metadata": {},
+   "source": [
+    "# Full System SImulation"
+   ]
+  },
+  {
+   "cell_type": "code",
+   "execution_count": null,
+   "metadata": {
+    "collapsed": true
+   },
+   "outputs": [],
+   "source": []
+  }
+ ],
+ "metadata": {
+  "celltoolbar": "Slideshow",
+  "kernelspec": {
+   "display_name": "Python 2",
+   "language": "python",
+   "name": "python2"
+  },
+  "language_info": {
+   "codemirror_mode": {
+    "name": "ipython",
+    "version": 2
+   },
+   "file_extension": ".py",
+   "mimetype": "text/x-python",
+   "name": "python",
+   "nbconvert_exporter": "python",
+   "pygments_lexer": "ipython2",
+   "version": "2.7.10"
+  }
+ },
+ "nbformat": 4,
+ "nbformat_minor": 0
+}

static/figures/gem5_architecture.svg

+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
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+
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+   xmlns:cc="http://creativecommons.org/ns#"
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