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---------- Begin Simulation Statistics ----------
sim_seconds                                  0.702617                       # Number of seconds simulated
sim_ticks                                702617073000                       # Number of ticks simulated
final_tick                               702617073000                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq                                 1000000000000                       # Frequency of simulated ticks
host_inst_rate                                 284164                       # Simulator instruction rate (inst/s)
host_op_rate                                   364069                       # Simulator op (including micro ops) rate (op/s)
host_tick_rate                            24593023532                       # Simulator tick rate (ticks/s)
host_mem_usage                                 648216                       # Number of bytes of host memory used
host_seconds                                    28.57                       # Real time elapsed on the host
sim_insts                                     8118483                       # Number of instructions simulated
sim_ops                                      10401348                       # Number of ops (including micro ops) simulated
system.clk_domain.voltage_domain.voltage            1                       # Voltage in Volts
system.clk_domain.clock                          1000                       # Clock period in ticks
system.mem_ctrl.bytes_read::cpu.inst         46241516                       # Number of bytes read from this memory
system.mem_ctrl.bytes_read::cpu.data          9897865                       # Number of bytes read from this memory
system.mem_ctrl.bytes_read::total            56139381                       # Number of bytes read from this memory
system.mem_ctrl.bytes_inst_read::cpu.inst     46241516                       # Number of instructions bytes read from this memory
system.mem_ctrl.bytes_inst_read::total       46241516                       # Number of instructions bytes read from this memory
system.mem_ctrl.bytes_written::cpu.data       5724409                       # Number of bytes written to this memory
system.mem_ctrl.bytes_written::total          5724409                       # Number of bytes written to this memory
system.mem_ctrl.num_reads::cpu.inst          11560379                       # Number of read requests responded to by this memory
system.mem_ctrl.num_reads::cpu.data           1702140                       # Number of read requests responded to by this memory
system.mem_ctrl.num_reads::total             13262519                       # Number of read requests responded to by this memory
system.mem_ctrl.num_writes::cpu.data          1394365                       # Number of write requests responded to by this memory
system.mem_ctrl.num_writes::total             1394365                       # Number of write requests responded to by this memory
system.mem_ctrl.bw_read::cpu.inst            65813254                       # Total read bandwidth from this memory (bytes/s)
system.mem_ctrl.bw_read::cpu.data            14087140                       # Total read bandwidth from this memory (bytes/s)
system.mem_ctrl.bw_read::total               79900394                       # Total read bandwidth from this memory (bytes/s)
system.mem_ctrl.bw_inst_read::cpu.inst       65813254                       # Instruction read bandwidth from this memory (bytes/s)
system.mem_ctrl.bw_inst_read::total          65813254                       # Instruction read bandwidth from this memory (bytes/s)
system.mem_ctrl.bw_write::cpu.data            8147267                       # Write bandwidth from this memory (bytes/s)
system.mem_ctrl.bw_write::total               8147267                       # Write bandwidth from this memory (bytes/s)
system.mem_ctrl.bw_total::cpu.inst           65813254                       # Total bandwidth to/from this memory (bytes/s)
system.mem_ctrl.bw_total::cpu.data           22234407                       # Total bandwidth to/from this memory (bytes/s)
system.mem_ctrl.bw_total::total              88047661                       # Total bandwidth to/from this memory (bytes/s)
system.mem_ctrl.readReqs                     13262520                       # Number of read requests accepted
system.mem_ctrl.writeReqs                     1394365                       # Number of write requests accepted
system.mem_ctrl.readBursts                   13262520                       # Number of DRAM read bursts, including those serviced by the write queue
system.mem_ctrl.writeBursts                   1394365                       # Number of DRAM write bursts, including those merged in the write queue
system.mem_ctrl.bytesReadDRAM               844215104                       # Total number of bytes read from DRAM
system.mem_ctrl.bytesReadWrQ                  4586176                       # Total number of bytes read from write queue
system.mem_ctrl.bytesWritten                     5120                       # Total number of bytes written to DRAM
system.mem_ctrl.bytesReadSys                 56139385                       # Total read bytes from the system interface side
system.mem_ctrl.bytesWrittenSys               5724409                       # Total written bytes from the system interface side
system.mem_ctrl.servicedByWrQ                   71659                       # Number of DRAM read bursts serviced by the write queue
system.mem_ctrl.mergedWrBursts                1394263                       # Number of DRAM write bursts merged with an existing one
system.mem_ctrl.neitherReadNorWriteReqs             0                       # Number of requests that are neither read nor write
system.mem_ctrl.perBankRdBursts::0            3387002                       # Per bank write bursts
system.mem_ctrl.perBankRdBursts::1             843189                       # Per bank write bursts
system.mem_ctrl.perBankRdBursts::2              99860                       # Per bank write bursts
system.mem_ctrl.perBankRdBursts::3            1479473                       # Per bank write bursts
system.mem_ctrl.perBankRdBursts::4            4117858                       # Per bank write bursts
system.mem_ctrl.perBankRdBursts::5             844983                       # Per bank write bursts
system.mem_ctrl.perBankRdBursts::6            2296781                       # Per bank write bursts
system.mem_ctrl.perBankRdBursts::7                 28                       # Per bank write bursts
system.mem_ctrl.perBankRdBursts::8              26317                       # Per bank write bursts
system.mem_ctrl.perBankRdBursts::9               6247                       # Per bank write bursts
system.mem_ctrl.perBankRdBursts::10              4833                       # Per bank write bursts
system.mem_ctrl.perBankRdBursts::11              5007                       # Per bank write bursts
system.mem_ctrl.perBankRdBursts::12             29993                       # Per bank write bursts
system.mem_ctrl.perBankRdBursts::13             23147                       # Per bank write bursts
system.mem_ctrl.perBankRdBursts::14             16344                       # Per bank write bursts
system.mem_ctrl.perBankRdBursts::15              9799                       # Per bank write bursts
system.mem_ctrl.perBankWrBursts::0                 20                       # Per bank write bursts
system.mem_ctrl.perBankWrBursts::1                  9                       # Per bank write bursts
system.mem_ctrl.perBankWrBursts::2                  9                       # Per bank write bursts
system.mem_ctrl.perBankWrBursts::3                  0                       # Per bank write bursts
system.mem_ctrl.perBankWrBursts::4                  0                       # Per bank write bursts
system.mem_ctrl.perBankWrBursts::5                  0                       # Per bank write bursts
system.mem_ctrl.perBankWrBursts::6                  0                       # Per bank write bursts
system.mem_ctrl.perBankWrBursts::7                  0                       # Per bank write bursts
system.mem_ctrl.perBankWrBursts::8                  0                       # Per bank write bursts
system.mem_ctrl.perBankWrBursts::9                  0                       # Per bank write bursts
system.mem_ctrl.perBankWrBursts::10                 0                       # Per bank write bursts
system.mem_ctrl.perBankWrBursts::11                 0                       # Per bank write bursts
system.mem_ctrl.perBankWrBursts::12                 0                       # Per bank write bursts
system.mem_ctrl.perBankWrBursts::13                 0                       # Per bank write bursts
system.mem_ctrl.perBankWrBursts::14                 3                       # Per bank write bursts
system.mem_ctrl.perBankWrBursts::15                39                       # Per bank write bursts
system.mem_ctrl.numRdRetry                          0                       # Number of times read queue was full causing retry
system.mem_ctrl.numWrRetry                          0                       # Number of times write queue was full causing retry
system.mem_ctrl.totGap                   702616997000                       # Total gap between requests
system.mem_ctrl.readPktSize::0                     91                       # Read request sizes (log2)
system.mem_ctrl.readPktSize::1                      1                       # Read request sizes (log2)
system.mem_ctrl.readPktSize::2               12490033                       # Read request sizes (log2)
system.mem_ctrl.readPktSize::3                 772395                       # Read request sizes (log2)
system.mem_ctrl.readPktSize::4                      0                       # Read request sizes (log2)
system.mem_ctrl.readPktSize::5                      0                       # Read request sizes (log2)
system.mem_ctrl.readPktSize::6                      0                       # Read request sizes (log2)
system.mem_ctrl.writePktSize::0                     5                       # Write request sizes (log2)
system.mem_ctrl.writePktSize::1                     2                       # Write request sizes (log2)
system.mem_ctrl.writePktSize::2               1357616                       # Write request sizes (log2)
system.mem_ctrl.writePktSize::3                 36742                       # Write request sizes (log2)
system.mem_ctrl.writePktSize::4                     0                       # Write request sizes (log2)
system.mem_ctrl.writePktSize::5                     0                       # Write request sizes (log2)
system.mem_ctrl.writePktSize::6                     0                       # Write request sizes (log2)
system.mem_ctrl.rdQLenPdf::0                 13190855                       # What read queue length does an incoming req see
system.mem_ctrl.rdQLenPdf::1                        6                       # What read queue length does an incoming req see
system.mem_ctrl.rdQLenPdf::2                        0                       # What read queue length does an incoming req see
system.mem_ctrl.rdQLenPdf::3                        0                       # What read queue length does an incoming req see
system.mem_ctrl.rdQLenPdf::4                        0                       # What read queue length does an incoming req see
system.mem_ctrl.rdQLenPdf::5                        0                       # What read queue length does an incoming req see
system.mem_ctrl.rdQLenPdf::6                        0                       # What read queue length does an incoming req see
system.mem_ctrl.rdQLenPdf::7                        0                       # What read queue length does an incoming req see
system.mem_ctrl.rdQLenPdf::8                        0                       # What read queue length does an incoming req see
system.mem_ctrl.rdQLenPdf::9                        0                       # What read queue length does an incoming req see
system.mem_ctrl.rdQLenPdf::10                       0                       # What read queue length does an incoming req see
system.mem_ctrl.rdQLenPdf::11                       0                       # What read queue length does an incoming req see
system.mem_ctrl.rdQLenPdf::12                       0                       # What read queue length does an incoming req see
system.mem_ctrl.rdQLenPdf::13                       0                       # What read queue length does an incoming req see
system.mem_ctrl.rdQLenPdf::14                       0                       # What read queue length does an incoming req see
system.mem_ctrl.rdQLenPdf::15                       0                       # What read queue length does an incoming req see
system.mem_ctrl.rdQLenPdf::16                       0                       # What read queue length does an incoming req see
system.mem_ctrl.rdQLenPdf::17                       0                       # What read queue length does an incoming req see
system.mem_ctrl.rdQLenPdf::18                       0                       # What read queue length does an incoming req see
system.mem_ctrl.rdQLenPdf::19                       0                       # What read queue length does an incoming req see
system.mem_ctrl.rdQLenPdf::20                       0                       # What read queue length does an incoming req see
system.mem_ctrl.rdQLenPdf::21                       0                       # What read queue length does an incoming req see
system.mem_ctrl.rdQLenPdf::22                       0                       # What read queue length does an incoming req see
system.mem_ctrl.rdQLenPdf::23                       0                       # What read queue length does an incoming req see
system.mem_ctrl.rdQLenPdf::24                       0                       # What read queue length does an incoming req see
system.mem_ctrl.rdQLenPdf::25                       0                       # What read queue length does an incoming req see
system.mem_ctrl.rdQLenPdf::26                       0                       # What read queue length does an incoming req see
system.mem_ctrl.rdQLenPdf::27                       0                       # What read queue length does an incoming req see
system.mem_ctrl.rdQLenPdf::28                       0                       # What read queue length does an incoming req see
system.mem_ctrl.rdQLenPdf::29                       0                       # What read queue length does an incoming req see
system.mem_ctrl.rdQLenPdf::30                       0                       # What read queue length does an incoming req see
system.mem_ctrl.rdQLenPdf::31                       0                       # What read queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::0                        1                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::1                        1                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::2                        1                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::3                        1                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::4                        1                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::5                        1                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::6                        1                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::7                        1                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::8                        1                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::9                        1                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::10                       1                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::11                       1                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::12                       1                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::13                       1                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::14                       1                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::15                       1                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::16                       1                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::17                       6                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::18                       6                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::19                       6                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::20                       6                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::21                       6                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::22                       5                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::23                       5                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::24                       5                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::25                       5                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::26                       5                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::27                       5                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::28                       5                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::29                       5                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::30                       5                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::31                       5                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::32                       5                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::33                       0                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::34                       0                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::35                       0                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::36                       0                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::37                       0                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::38                       0                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::39                       0                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::40                       0                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::41                       0                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::42                       0                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::43                       0                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::44                       0                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::45                       0                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::46                       0                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::47                       0                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::48                       0                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::49                       0                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::50                       0                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::51                       0                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::52                       0                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::53                       0                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::54                       0                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::55                       0                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::56                       0                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::57                       0                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::58                       0                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::59                       0                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::60                       0                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::61                       0                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::62                       0                       # What write queue length does an incoming req see
system.mem_ctrl.wrQLenPdf::63                       0                       # What write queue length does an incoming req see
system.mem_ctrl.bytesPerActivate::samples      1163485                       # Bytes accessed per row activation
system.mem_ctrl.bytesPerActivate::mean     725.594874                       # Bytes accessed per row activation
system.mem_ctrl.bytesPerActivate::gmean    544.779437                       # Bytes accessed per row activation
system.mem_ctrl.bytesPerActivate::stdev    376.356111                       # Bytes accessed per row activation
system.mem_ctrl.bytesPerActivate::0-127        112777      9.69%      9.69% # Bytes accessed per row activation
system.mem_ctrl.bytesPerActivate::128-255        98796      8.49%     18.18% # Bytes accessed per row activation
system.mem_ctrl.bytesPerActivate::256-383        96776      8.32%     26.50% # Bytes accessed per row activation
system.mem_ctrl.bytesPerActivate::384-511        46399      3.99%     30.49% # Bytes accessed per row activation
system.mem_ctrl.bytesPerActivate::512-639        51545      4.43%     34.92% # Bytes accessed per row activation
system.mem_ctrl.bytesPerActivate::640-767        55885      4.80%     39.72% # Bytes accessed per row activation
system.mem_ctrl.bytesPerActivate::768-895        30477      2.62%     42.34% # Bytes accessed per row activation
system.mem_ctrl.bytesPerActivate::896-1023        37964      3.26%     45.61% # Bytes accessed per row activation
system.mem_ctrl.bytesPerActivate::1024-1151       632866     54.39%    100.00% # Bytes accessed per row activation
system.mem_ctrl.bytesPerActivate::total       1163485                       # Bytes accessed per row activation
system.mem_ctrl.rdPerTurnAround::samples            5                       # Reads before turning the bus around for writes
system.mem_ctrl.rdPerTurnAround::mean         2638125                       # Reads before turning the bus around for writes
system.mem_ctrl.rdPerTurnAround::gmean    7777.289718                       # Reads before turning the bus around for writes
system.mem_ctrl.rdPerTurnAround::stdev   5896019.911261                       # Reads before turning the bus around for writes
system.mem_ctrl.rdPerTurnAround::0-524287            4     80.00%     80.00% # Reads before turning the bus around for writes
system.mem_ctrl.rdPerTurnAround::1.31072e+07-1.36315e+07            1     20.00%    100.00% # Reads before turning the bus around for writes
system.mem_ctrl.rdPerTurnAround::total              5                       # Reads before turning the bus around for writes
system.mem_ctrl.wrPerTurnAround::samples            5                       # Writes before turning the bus around for reads
system.mem_ctrl.wrPerTurnAround::mean              16                       # Writes before turning the bus around for reads
system.mem_ctrl.wrPerTurnAround::gmean      16.000000                       # Writes before turning the bus around for reads
system.mem_ctrl.wrPerTurnAround::16                 5    100.00%    100.00% # Writes before turning the bus around for reads
system.mem_ctrl.wrPerTurnAround::total              5                       # Writes before turning the bus around for reads
system.mem_ctrl.totQLat                   39894506750                       # Total ticks spent queuing
system.mem_ctrl.totMemAccLat             287223150500                       # Total ticks spent from burst creation until serviced by the DRAM
system.mem_ctrl.totBusLat                 65954305000                       # Total ticks spent in databus transfers
system.mem_ctrl.avgQLat                       3024.41                       # Average queueing delay per DRAM burst
system.mem_ctrl.avgBusLat                     5000.00                       # Average bus latency per DRAM burst
system.mem_ctrl.avgMemAccLat                 21774.41                       # Average memory access latency per DRAM burst
system.mem_ctrl.avgRdBW                       1201.53                       # Average DRAM read bandwidth in MiByte/s
system.mem_ctrl.avgWrBW                          0.01                       # Average achieved write bandwidth in MiByte/s
system.mem_ctrl.avgRdBWSys                      79.90                       # Average system read bandwidth in MiByte/s
system.mem_ctrl.avgWrBWSys                       8.15                       # Average system write bandwidth in MiByte/s
system.mem_ctrl.peakBW                       12800.00                       # Theoretical peak bandwidth in MiByte/s
system.mem_ctrl.busUtil                          9.39                       # Data bus utilization in percentage
system.mem_ctrl.busUtilRead                      9.39                       # Data bus utilization in percentage for reads
system.mem_ctrl.busUtilWrite                     0.00                       # Data bus utilization in percentage for writes
system.mem_ctrl.avgRdQLen                        1.00                       # Average read queue length when enqueuing
system.mem_ctrl.avgWrQLen                       30.93                       # Average write queue length when enqueuing
system.mem_ctrl.readRowHits                  12027385                       # Number of row buffer hits during reads
system.mem_ctrl.writeRowHits                       67                       # Number of row buffer hits during writes
system.mem_ctrl.readRowHitRate                  91.18                       # Row buffer hit rate for reads
system.mem_ctrl.writeRowHitRate                 65.69                       # Row buffer hit rate for writes
system.mem_ctrl.avgGap                       47937.68                       # Average gap between requests
system.mem_ctrl.pageHitRate                     91.18                       # Row buffer hit rate, read and write combined
system.mem_ctrl_0.actEnergy                8430806160                       # Energy for activate commands per rank (pJ)
system.mem_ctrl_0.preEnergy                4600142250                       # Energy for precharge commands per rank (pJ)
system.mem_ctrl_0.readEnergy             101939518200                       # Energy for read commands per rank (pJ)
system.mem_ctrl_0.writeEnergy                  246240                       # Energy for write commands per rank (pJ)
system.mem_ctrl_0.refreshEnergy           45891437280                       # Energy for refresh commands per rank (pJ)
system.mem_ctrl_0.actBackEnergy          474579027450                       # Energy for active background per rank (pJ)
system.mem_ctrl_0.preBackEnergy            5272140000                       # Energy for precharge background per rank (pJ)
system.mem_ctrl_0.totalEnergy            640713317580                       # Total energy per rank (pJ)
system.mem_ctrl_0.averagePower             911.896997                       # Core power per rank (mW)
system.mem_ctrl_0.memoryStateTime::IDLE    4383705250                       # Time in different power states
system.mem_ctrl_0.memoryStateTime::REF    23461880000                       # Time in different power states
system.mem_ctrl_0.memoryStateTime::PRE_PDN            0                       # Time in different power states
system.mem_ctrl_0.memoryStateTime::ACT   674770316000                       # Time in different power states
system.mem_ctrl_0.memoryStateTime::ACT_PDN            0                       # Time in different power states
system.mem_ctrl_1.actEnergy                 365140440                       # Energy for activate commands per rank (pJ)
system.mem_ctrl_1.preEnergy                 199233375                       # Energy for precharge commands per rank (pJ)
system.mem_ctrl_1.readEnergy                949018200                       # Energy for read commands per rank (pJ)
system.mem_ctrl_1.writeEnergy                  272160                       # Energy for write commands per rank (pJ)
system.mem_ctrl_1.refreshEnergy           45891437280                       # Energy for refresh commands per rank (pJ)
system.mem_ctrl_1.actBackEnergy          134521471170                       # Energy for active background per rank (pJ)
system.mem_ctrl_1.preBackEnergy          303568242000                       # Energy for precharge background per rank (pJ)
system.mem_ctrl_1.totalEnergy            485494814625                       # Total energy per rank (pJ)
system.mem_ctrl_1.averagePower             690.981834                       # Core power per rank (mW)
system.mem_ctrl_1.memoryStateTime::IDLE  504147571500                       # Time in different power states
system.mem_ctrl_1.memoryStateTime::REF    23461880000                       # Time in different power states
system.mem_ctrl_1.memoryStateTime::PRE_PDN            0                       # Time in different power states
system.mem_ctrl_1.memoryStateTime::ACT   175006511500                       # Time in different power states
system.mem_ctrl_1.memoryStateTime::ACT_PDN            0                       # Time in different power states
system.cpu.dstage2_mmu.stage2_tlb.walker.walks            0                       # Table walker walks requested
system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data            0                       # Table walker requests started/completed, data/inst
system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst            0                       # Table walker requests started/completed, data/inst
system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::total            0                       # Table walker requests started/completed, data/inst
system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Data            0                       # Table walker requests started/completed, data/inst
system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Inst            0                       # Table walker requests started/completed, data/inst
system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::total            0                       # Table walker requests started/completed, data/inst
system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin::total            0                       # Table walker requests started/completed, data/inst
system.cpu.dstage2_mmu.stage2_tlb.inst_hits            0                       # ITB inst hits
system.cpu.dstage2_mmu.stage2_tlb.inst_misses            0                       # ITB inst misses
system.cpu.dstage2_mmu.stage2_tlb.read_hits            0                       # DTB read hits
system.cpu.dstage2_mmu.stage2_tlb.read_misses            0                       # DTB read misses
system.cpu.dstage2_mmu.stage2_tlb.write_hits            0                       # DTB write hits
system.cpu.dstage2_mmu.stage2_tlb.write_misses            0                       # DTB write misses
system.cpu.dstage2_mmu.stage2_tlb.flush_tlb            0                       # Number of times complete TLB was flushed
system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_mva            0                       # Number of times TLB was flushed by MVA
system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_mva_asid            0                       # Number of times TLB was flushed by MVA & ASID
system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_asid            0                       # Number of times TLB was flushed by ASID
system.cpu.dstage2_mmu.stage2_tlb.flush_entries            0                       # Number of entries that have been flushed from TLB
system.cpu.dstage2_mmu.stage2_tlb.align_faults            0                       # Number of TLB faults due to alignment restrictions
system.cpu.dstage2_mmu.stage2_tlb.prefetch_faults            0                       # Number of TLB faults due to prefetch
system.cpu.dstage2_mmu.stage2_tlb.domain_faults            0                       # Number of TLB faults due to domain restrictions
system.cpu.dstage2_mmu.stage2_tlb.perms_faults            0                       # Number of TLB faults due to permissions restrictions
system.cpu.dstage2_mmu.stage2_tlb.read_accesses            0                       # DTB read accesses
system.cpu.dstage2_mmu.stage2_tlb.write_accesses            0                       # DTB write accesses
system.cpu.dstage2_mmu.stage2_tlb.inst_accesses            0                       # ITB inst accesses
system.cpu.dstage2_mmu.stage2_tlb.hits              0                       # DTB hits
system.cpu.dstage2_mmu.stage2_tlb.misses            0                       # DTB misses
system.cpu.dstage2_mmu.stage2_tlb.accesses            0                       # DTB accesses
system.cpu.dtb.walker.walks                         0                       # Table walker walks requested
system.cpu.dtb.walker.walkRequestOrigin_Requested::Data            0                       # Table walker requests started/completed, data/inst
system.cpu.dtb.walker.walkRequestOrigin_Requested::Inst            0                       # Table walker requests started/completed, data/inst
system.cpu.dtb.walker.walkRequestOrigin_Requested::total            0                       # Table walker requests started/completed, data/inst
system.cpu.dtb.walker.walkRequestOrigin_Completed::Data            0                       # Table walker requests started/completed, data/inst
system.cpu.dtb.walker.walkRequestOrigin_Completed::Inst            0                       # Table walker requests started/completed, data/inst
system.cpu.dtb.walker.walkRequestOrigin_Completed::total            0                       # Table walker requests started/completed, data/inst
system.cpu.dtb.walker.walkRequestOrigin::total            0                       # Table walker requests started/completed, data/inst
system.cpu.dtb.inst_hits                            0                       # ITB inst hits
system.cpu.dtb.inst_misses                          0                       # ITB inst misses
system.cpu.dtb.read_hits                            0                       # DTB read hits
system.cpu.dtb.read_misses                          0                       # DTB read misses
system.cpu.dtb.write_hits                           0                       # DTB write hits
system.cpu.dtb.write_misses                         0                       # DTB write misses
system.cpu.dtb.flush_tlb                            0                       # Number of times complete TLB was flushed
system.cpu.dtb.flush_tlb_mva                        0                       # Number of times TLB was flushed by MVA
system.cpu.dtb.flush_tlb_mva_asid                   0                       # Number of times TLB was flushed by MVA & ASID
system.cpu.dtb.flush_tlb_asid                       0                       # Number of times TLB was flushed by ASID
system.cpu.dtb.flush_entries                        0                       # Number of entries that have been flushed from TLB
system.cpu.dtb.align_faults                         0                       # Number of TLB faults due to alignment restrictions
system.cpu.dtb.prefetch_faults                      0                       # Number of TLB faults due to prefetch
system.cpu.dtb.domain_faults                        0                       # Number of TLB faults due to domain restrictions
system.cpu.dtb.perms_faults                         0                       # Number of TLB faults due to permissions restrictions
system.cpu.dtb.read_accesses                        0                       # DTB read accesses
system.cpu.dtb.write_accesses                       0                       # DTB write accesses
system.cpu.dtb.inst_accesses                        0                       # ITB inst accesses
system.cpu.dtb.hits                                 0                       # DTB hits
system.cpu.dtb.misses                               0                       # DTB misses
system.cpu.dtb.accesses                             0                       # DTB accesses
system.cpu.istage2_mmu.stage2_tlb.walker.walks            0                       # Table walker walks requested
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data            0                       # Table walker requests started/completed, data/inst
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst            0                       # Table walker requests started/completed, data/inst
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::total            0                       # Table walker requests started/completed, data/inst
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Data            0                       # Table walker requests started/completed, data/inst
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Inst            0                       # Table walker requests started/completed, data/inst
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::total            0                       # Table walker requests started/completed, data/inst
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin::total            0                       # Table walker requests started/completed, data/inst
system.cpu.istage2_mmu.stage2_tlb.inst_hits            0                       # ITB inst hits
system.cpu.istage2_mmu.stage2_tlb.inst_misses            0                       # ITB inst misses
system.cpu.istage2_mmu.stage2_tlb.read_hits            0                       # DTB read hits
system.cpu.istage2_mmu.stage2_tlb.read_misses            0                       # DTB read misses
system.cpu.istage2_mmu.stage2_tlb.write_hits            0                       # DTB write hits
system.cpu.istage2_mmu.stage2_tlb.write_misses            0                       # DTB write misses
system.cpu.istage2_mmu.stage2_tlb.flush_tlb            0                       # Number of times complete TLB was flushed
system.cpu.istage2_mmu.stage2_tlb.flush_tlb_mva            0                       # Number of times TLB was flushed by MVA
system.cpu.istage2_mmu.stage2_tlb.flush_tlb_mva_asid            0                       # Number of times TLB was flushed by MVA & ASID
system.cpu.istage2_mmu.stage2_tlb.flush_tlb_asid            0                       # Number of times TLB was flushed by ASID
system.cpu.istage2_mmu.stage2_tlb.flush_entries            0                       # Number of entries that have been flushed from TLB
system.cpu.istage2_mmu.stage2_tlb.align_faults            0                       # Number of TLB faults due to alignment restrictions
system.cpu.istage2_mmu.stage2_tlb.prefetch_faults            0                       # Number of TLB faults due to prefetch
system.cpu.istage2_mmu.stage2_tlb.domain_faults            0                       # Number of TLB faults due to domain restrictions
system.cpu.istage2_mmu.stage2_tlb.perms_faults            0                       # Number of TLB faults due to permissions restrictions
system.cpu.istage2_mmu.stage2_tlb.read_accesses            0                       # DTB read accesses
system.cpu.istage2_mmu.stage2_tlb.write_accesses            0                       # DTB write accesses
system.cpu.istage2_mmu.stage2_tlb.inst_accesses            0                       # ITB inst accesses
system.cpu.istage2_mmu.stage2_tlb.hits              0                       # DTB hits
system.cpu.istage2_mmu.stage2_tlb.misses            0                       # DTB misses
system.cpu.istage2_mmu.stage2_tlb.accesses            0                       # DTB accesses
system.cpu.itb.walker.walks                         0                       # Table walker walks requested
system.cpu.itb.walker.walkRequestOrigin_Requested::Data            0                       # Table walker requests started/completed, data/inst
system.cpu.itb.walker.walkRequestOrigin_Requested::Inst            0                       # Table walker requests started/completed, data/inst
system.cpu.itb.walker.walkRequestOrigin_Requested::total            0                       # Table walker requests started/completed, data/inst
system.cpu.itb.walker.walkRequestOrigin_Completed::Data            0                       # Table walker requests started/completed, data/inst
system.cpu.itb.walker.walkRequestOrigin_Completed::Inst            0                       # Table walker requests started/completed, data/inst
system.cpu.itb.walker.walkRequestOrigin_Completed::total            0                       # Table walker requests started/completed, data/inst
system.cpu.itb.walker.walkRequestOrigin::total            0                       # Table walker requests started/completed, data/inst
system.cpu.itb.inst_hits                            0                       # ITB inst hits
system.cpu.itb.inst_misses                          0                       # ITB inst misses
system.cpu.itb.read_hits                            0                       # DTB read hits
system.cpu.itb.read_misses                          0                       # DTB read misses
system.cpu.itb.write_hits                           0                       # DTB write hits
system.cpu.itb.write_misses                         0                       # DTB write misses
system.cpu.itb.flush_tlb                            0                       # Number of times complete TLB was flushed
system.cpu.itb.flush_tlb_mva                        0                       # Number of times TLB was flushed by MVA
system.cpu.itb.flush_tlb_mva_asid                   0                       # Number of times TLB was flushed by MVA & ASID
system.cpu.itb.flush_tlb_asid                       0                       # Number of times TLB was flushed by ASID
system.cpu.itb.flush_entries                        0                       # Number of entries that have been flushed from TLB
system.cpu.itb.align_faults                         0                       # Number of TLB faults due to alignment restrictions
system.cpu.itb.prefetch_faults                      0                       # Number of TLB faults due to prefetch
system.cpu.itb.domain_faults                        0                       # Number of TLB faults due to domain restrictions
system.cpu.itb.perms_faults                         0                       # Number of TLB faults due to permissions restrictions
system.cpu.itb.read_accesses                        0                       # DTB read accesses
system.cpu.itb.write_accesses                       0                       # DTB write accesses
system.cpu.itb.inst_accesses                        0                       # ITB inst accesses
system.cpu.itb.hits                                 0                       # DTB hits
system.cpu.itb.misses                               0                       # DTB misses
system.cpu.itb.accesses                             0                       # DTB accesses
system.cpu.workload.num_syscalls                    9                       # Number of system calls
system.cpu.numCycles                        702617073                       # number of cpu cycles simulated
system.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started
system.cpu.numWorkItemsCompleted                    0                       # number of work items this cpu completed
system.cpu.committedInsts                     8118483                       # Number of instructions committed
system.cpu.committedOps                      10401348                       # Number of ops (including micro ops) committed
system.cpu.num_int_alu_accesses               7068256                       # Number of integer alu accesses
system.cpu.num_fp_alu_accesses                4980727                       # Number of float alu accesses
system.cpu.num_func_calls                      387874                       # number of times a function call or return occured
system.cpu.num_conditional_control_insts       546862                       # number of instructions that are conditional controls
system.cpu.num_int_insts                      7068256                       # number of integer instructions
system.cpu.num_fp_insts                       4980727                       # number of float instructions
system.cpu.num_int_register_reads            42369898                       # number of times the integer registers were read
system.cpu.num_int_register_writes            5749679                       # number of times the integer registers were written
system.cpu.num_fp_register_reads              9978213                       # number of times the floating registers were read
system.cpu.num_fp_register_writes             6615333                       # number of times the floating registers were written
system.cpu.num_cc_register_reads             36480319                       # number of times the CC registers were read
system.cpu.num_cc_register_writes             2736302                       # number of times the CC registers were written
system.cpu.num_mem_refs                       3096528                       # number of memory refs
system.cpu.num_load_insts                     1702147                       # Number of load instructions
system.cpu.num_store_insts                    1394381                       # Number of store instructions
system.cpu.num_idle_cycles                   0.001000                       # Number of idle cycles
system.cpu.num_busy_cycles               702617072.999000                       # Number of busy cycles
system.cpu.not_idle_fraction                 1.000000                       # Percentage of non-idle cycles
system.cpu.idle_fraction                     0.000000                       # Percentage of idle cycles
system.cpu.Branches                            978284                       # Number of branches fetched
system.cpu.op_class::No_OpClass                     0      0.00%      0.00% # Class of executed instruction
system.cpu.op_class::IntAlu                   4356627     41.89%     41.89% # Class of executed instruction
system.cpu.op_class::IntMult                        4      0.00%     41.89% # Class of executed instruction
system.cpu.op_class::IntDiv                         0      0.00%     41.89% # Class of executed instruction
system.cpu.op_class::FloatAdd                       0      0.00%     41.89% # Class of executed instruction
system.cpu.op_class::FloatCmp                       0      0.00%     41.89% # Class of executed instruction
system.cpu.op_class::FloatCvt                       0      0.00%     41.89% # Class of executed instruction
system.cpu.op_class::FloatMult                      0      0.00%     41.89% # Class of executed instruction
system.cpu.op_class::FloatDiv                       0      0.00%     41.89% # Class of executed instruction
system.cpu.op_class::FloatSqrt                      0      0.00%     41.89% # Class of executed instruction
system.cpu.op_class::SimdAdd                        0      0.00%     41.89% # Class of executed instruction
system.cpu.op_class::SimdAddAcc                     0      0.00%     41.89% # Class of executed instruction
system.cpu.op_class::SimdAlu                        0      0.00%     41.89% # Class of executed instruction
system.cpu.op_class::SimdCmp                        0      0.00%     41.89% # Class of executed instruction
system.cpu.op_class::SimdCvt                        0      0.00%     41.89% # Class of executed instruction
system.cpu.op_class::SimdMisc                       0      0.00%     41.89% # Class of executed instruction
system.cpu.op_class::SimdMult                       0      0.00%     41.89% # Class of executed instruction
system.cpu.op_class::SimdMultAcc                    0      0.00%     41.89% # Class of executed instruction
system.cpu.op_class::SimdShift                      0      0.00%     41.89% # Class of executed instruction
system.cpu.op_class::SimdShiftAcc                   0      0.00%     41.89% # Class of executed instruction
system.cpu.op_class::SimdSqrt                       0      0.00%     41.89% # Class of executed instruction
system.cpu.op_class::SimdFloatAdd              732413      7.04%     48.93% # Class of executed instruction
system.cpu.op_class::SimdFloatAlu                   0      0.00%     48.93% # Class of executed instruction
system.cpu.op_class::SimdFloatCmp              172095      1.65%     50.58% # Class of executed instruction
system.cpu.op_class::SimdFloatCvt                   0      0.00%     50.58% # Class of executed instruction
system.cpu.op_class::SimdFloatDiv              149013      1.43%     52.01% # Class of executed instruction
system.cpu.op_class::SimdFloatMisc            1092367     10.50%     62.52% # Class of executed instruction
system.cpu.op_class::SimdFloatMult             349482      3.36%     65.88% # Class of executed instruction
system.cpu.op_class::SimdFloatMultAcc          433860      4.17%     70.05% # Class of executed instruction
system.cpu.op_class::SimdFloatSqrt              18998      0.18%     70.23% # Class of executed instruction
system.cpu.op_class::MemRead                  1702147     16.36%     86.59% # Class of executed instruction
system.cpu.op_class::MemWrite                 1394381     13.41%    100.00% # Class of executed instruction
system.cpu.op_class::IprAccess                      0      0.00%    100.00% # Class of executed instruction
system.cpu.op_class::InstPrefetch                   0      0.00%    100.00% # Class of executed instruction
system.cpu.op_class::total                   10401387                       # Class of executed instruction
system.membus.trans_dist::ReadReq            13262488                       # Transaction distribution
system.membus.trans_dist::ReadResp           13262498                       # Transaction distribution
system.membus.trans_dist::WriteReq            1394354                       # Transaction distribution
system.membus.trans_dist::WriteResp           1394354                       # Transaction distribution
system.membus.trans_dist::SoftPFReq                21                       # Transaction distribution
system.membus.trans_dist::SoftPFResp               21                       # Transaction distribution
system.membus.trans_dist::LoadLockedReq            11                       # Transaction distribution
system.membus.trans_dist::StoreCondReq             11                       # Transaction distribution
system.membus.trans_dist::StoreCondResp            11                       # Transaction distribution
system.membus.pkt_count_system.cpu.icache_port::system.mem_ctrl.port     23120759                       # Packet count per connected master and slave (bytes)
system.membus.pkt_count_system.cpu.dcache_port::system.mem_ctrl.port      6193010                       # Packet count per connected master and slave (bytes)
system.membus.pkt_count::total               29313769                       # Packet count per connected master and slave (bytes)
system.membus.pkt_size_system.cpu.icache_port::system.mem_ctrl.port     46241516                       # Cumulative packet size per connected master and slave (bytes)
system.membus.pkt_size_system.cpu.dcache_port::system.mem_ctrl.port     15622274                       # Cumulative packet size per connected master and slave (bytes)
system.membus.pkt_size::total                61863790                       # Cumulative packet size per connected master and slave (bytes)
system.membus.snoops                                0                       # Total snoops (count)
system.membus.snoop_fanout::samples          14656885                       # Request fanout histogram
system.membus.snoop_fanout::mean             0.788734                       # Request fanout histogram
system.membus.snoop_fanout::stdev            0.408207                       # Request fanout histogram
system.membus.snoop_fanout::underflows              0      0.00%      0.00% # Request fanout histogram
system.membus.snoop_fanout::0                 3096505     21.13%     21.13% # Request fanout histogram
system.membus.snoop_fanout::1                11560380     78.87%    100.00% # Request fanout histogram
system.membus.snoop_fanout::overflows               0      0.00%    100.00% # Request fanout histogram
system.membus.snoop_fanout::min_value               0                       # Request fanout histogram
system.membus.snoop_fanout::max_value               1                       # Request fanout histogram
system.membus.snoop_fanout::total            14656885                       # Request fanout histogram
system.membus.reqLayer0.occupancy         16051250000                       # Layer occupancy (ticks)
system.membus.reqLayer0.utilization               2.3                       # Layer utilization (%)
system.membus.respLayer0.occupancy        26241570250                       # Layer occupancy (ticks)
system.membus.respLayer0.utilization              3.7                       # Layer utilization (%)
system.membus.respLayer1.occupancy         5288313000                       # Layer occupancy (ticks)
system.membus.respLayer1.utilization              0.8                       # Layer utilization (%)

---------- End Simulation Statistics   ----------