Books

J. Ruf (Editor), "Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen"
    5. GI/ITG/GMM-Workshop Beschreibungssprachen und Verifikation, Shakerverlag Achen, Februar 2002

J. Ruf, "Techniken zur Modellierung und Verifikation von Echtzeitsystemen"
    Dissertation, Universität Karlsruhe, Logosverlag Berlin, March 2000

Book Chapter

S. Flake, W. Müller, U. Pape, and J. Ruf, "Specification and Formal Verification of Temporal Properties of Production Automation Systems"
    in LNCS ????, Springer Verlag Heidelberg, October 2004, to appear.

J. Ruf, R. Weiss, T. Kropf, and W. Rosenstiel "Modeling and Formal Verification of Production Automation Systems"
    in LNCS ????, Springer Verlag Heidelberg, October 2004, to appear.

W. Müller, W. Rosenstiel, J. Ruf, "An ASM-Based SystemC Simulation Semantics"
    in SystemC-Methodologies and Applications,Kluwer Academic Publisher, June 2003.

Journals

A. Krebs and J. Ruf,"Optimized Temporal Logic Compilation"
    in Journal on Universal Computer Science (J.UCS), Special Issue on Tools for System Design and Verification, February 2003, Springer Verlag Heidelberg

J. Ruf and T. Kropf,"Verification and Analysis of Discrete Timed Systems"
    in Journal on Formal Methods in System Design, Kluwer Academic Publishers, 2003

J. Ruf, "RAVEN: Real-Time Analyzing and Verification Environment"
    in Journal on Universal Computer Science (J.UCS), Special Issue on Tools for System Design and Verification, February 2001, Springer Verlag Heidelberg

W. Reif, J. Ruf, G. Schellhorn, and T. Vollmer, "Correctness of Efficient Real-Time Model Checking"
    in Journal on Universal Computer Science (J.UCS), Special Issue on Tools for System Design and Verification, February 2001, Springer Verlag Heidelberg

J.Ruf and T. Kropf, "Formale Verifikation diskreter Echtzeitsysteme"
    in it+ti Informationstechnik und technische Informatik, February 2001, Oldenbourg Verlag Munich

J. Ruf and T. Kropf, "Using MTBDDs for Discrete Timed Symbolic Model Checking",
    Multiple-Valued Logic -- An International Journal, 1998. Special Issue on Decision Diagrams, 1998
    Gordon and Breach Publisher.

International conference papers

J. Klose, T. Kropf, and J. Ruf, "A Visual Approach to Validating System Level Designs",
   Internatianal Sympossium on System Level Design (ISSS 2002),
   Kyoto, Japan, 3.-5. Oktober 2002. ©IEEE, to appear.

J. Ruf and T. Kropf, "Formal Data Analysis of Timed Finite State Systems",
   14th Euromicro Conference on Real-Time Systems (ECRTS),
   Vienna, Austria, June 19-21, 2002. ©IEEE Computer Society Press.

S. Flake, C. Geiger, W. Mueller, V. Paelke, W. Rosenbach, J. Ruf, "Customer-Oriented Systems Design through Virtual Prototypes",
   In Proceedings of IEEE KMN 2001,    Boston, USA, June 2001. ©IEEE, September 2001. [PS]

J.Ruf, D. W. Hoffmann, T. Kropf and W. Rosenstiel, "Simulation-Guided Property Checking Based on Multi-Valued AR-Automata",
    In Proceedings of Design Automation and Test in Europe (DATE), Munich, March 2001, [PS]
    IEEE Conmputer Society Press, Los Alamitos

W. Müller, J.Ruf, D. W. Hoffmann, J. Gerlach, T. Kropf and W. Rosenstiel, "The Simulation Semantics of SystemC",
    In Proceedings of Design Automation and Test in Europe (DATE), Munich, March 2001,
    IEEE Conmputer Society Press, Los Alamitos [PDF]

S. Flake, W. Müller, U. Pape and J. Ruf, "Analyzing Timing Constraints in Flexible Manufacturing Systems"
    In Proceedings of Intelligent Automated Manufacturing (IAM). Dubai, March 2001 [PS]

J. Ruf, D. Hoffmann, T. Kropf and W. Rosenstiel, "Checking Temporal Properties under Simulation of Executable Specifications"
    in Proceedings of Workshop on High Level Descriptions and Verification Techniques (HLDVT 2000),
    Stanford, CA, November 2000, IEEE Computer Society Press [PS]

W. Reif, J. Ruf, G. Schellhorn, and T. Vollmer, "Do You Trust Your Model Checker?"
    in Proceedings of Formal Methods in Computer Aided Design (FMCAD 2000),
    Austin Texas November 2000, Springer Verlag Heidelberg [PDF] [PS]

J. Ruf, D. Hoffmann, T. Kropf and W. Rosenstiel, "Simulation Based Validation of FLTL Formulas in Executable System Descriptions"
    in Proceedings of Forum on Design Languages (FDL 2000),
    Tübingen September 2000, SIG-VHDL and ECSI [PS]

D. W. Hoffmann, J. Ruf, T. Kropf, W. Rosenstiel: "Simulation meets verification -- verifying temporal properties in SystemC"
    in Proceedings of the Symposium on Digital Systems Design (DSD), Maastricht, The Netherlands, 2000

J. Ruf and T. Kropf, "Analyzing Real-Time Systems",
    in Design, Automation and Test in Europ (DATE), Paris France March 2000
    IEEE Computer Society Press. [PS]

J. Ruf and T. Kropf, "Modeling and Checking Netwerks of Communicating Real-Time Processes",
    in Conference on Correct Hardware Design and Verification Methods (CHARME) ,
    pp. 265-279, Bad Herrenalb, Germany, October 1999. IFIP WG 10.5, Springer Verlag, LNCS 1703. [PS] [PS.GZ]

J. Ruf and T. Kropf, "Using MTBDDs for Composition and Model Checking of Real-Time Systems",
    in Formal Methods in Computer Aided design (FMCAD), Palo Alto, CA, November 1998.
    Springer, November 1998. [PS.GZ]

J. Ruf and T. Kropf, "Symbolic Model Checking for a Discrete Clocked Temporal Logic with Intervals",
    in Conference on Correct Hardware Design and Verification Methods (CHARME) (E. Cerny and D. Probst, editors) ,
    pp. 146-166, Montreal, Canada, October 1997. IFIP WG 10.5, Chapman and Hall. [PS.GZ]

J. Ruf and T. Kropf, "A New Algorithm for Discrete Timed Symbolic Model Checking",
    in Hybrid and Real-Time Systems (O. Maler, editor) , pp. 18-32, Grenoble, France, 1997.
    Springer Verlag, LNCS 1201. [PS.GZ]

T. Kropf and J. Ruf, "Using MTBDDs for Discrete Timed Symbolic Model Checking",
    in European Design and Test Conference (EDTC), pp. 182-187, Paris, France, March 1997.
    IEEE Computer Society Press (Los Alamitos, California). [PS.GZ]

Workshops

P. Peranandam, R. Weiss, J. Ruf, and T. Kropf "Transactional level verification and coverage metrics by means of symbolic simulation"
   In Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen.
   GI/ITG/GMM Workshop, Shaker Verlag, February 2004.

J. Ruf, P.M. Peranandam, T. Kropf, W. Rosenstiel "Using Symbolic Simulation for Bounded Property Checking"
   In Proceedings of Forum on Design Languages (FDL)
   September 2003, Frankfurt.

J. Ruf and T. Kropf and P. Peranandam "Bounded Property Checking with Symbolic Simulation"
   In Proceedings of GI/ITG/GMM-Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation
    von Schaltungen und Systemen, 24.-25. Febrauar 2003, Bremen.

J. Ruf and T. Kropf "Combination of Simulation and Formal Verification"
   In Proceedings of GI/ITG/GMM-Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation
    von Schaltungen und Systemen, 25.-27. Febrauar 2002, Tübingen, Shaker Verlag, Achen. [PS]

J. Ruf, "Data Analysis of Timed Finite State Systems"
   In Proceedings of GI/ITG/GMM-Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation
    von Schaltungen und Systemen, Meißen, Februar 2001, MoPress [PS]

S. Flake, W. Mueller, U. Pape, and J. Ruf, "Modellprüfung für den Entwurf von Fertigungssteuerungssystemen"
    GI-Fachtagung "Modellierung betrieblicher Informationssysteme", MobIS 2000,
    Siegen, Germany, October 2000.

J. Ruf, "A Toolest for the Symbolic Examination of Finite State Transition systems",
    in Methoden und Beschreibungssprachen zur Modellierung und Verifikation von
    Schaltungen und Systemen, GI/ITG/GMM Workshop, Frankfurt, March 2000. [PS]

S. Flake, W. Müller and J. Ruf, "Structures English for Specification in Model Checking",
    in Methoden und Beschreibungssprachen zur Modellierung und Verifikation von
    Schaltungen und Systemen, pp. 91-100. GI/ITG/GMM Workshop, Frankfurt, March 2000. [PS]

J. Ruf and T. Kropf, "Modeling Real-Time Systems with I/O-Interval Structures",
    in Methoden und Beschreibungssprachen zur Modellierung und Verifikation von
    Schaltungen und Systemen, pp. 91-100. GI/ITG/GMM Workshop, Braunschweig, Shaker Verlag, March 1999. [PS]

T. Kropf, J. Ruf, K. Schneider, and M. Wild, "A Synchronous Language for Modeling and Verifying Real Time and Embedded Systems",
    in GI/ITG/GME Workshop: Methoden des Entwurfs und der Verifikation digitaler Schaltungen und Systeme
    und Beschreibungssprachen und Modellierung von Schaltungen und Systemen,
    pp. 11-20. HNI-Verlagsschriften, ISBN 3-931466-35-3, 1998. [PS]

T. Kropf, J. Ruf, K. Schneider, and M. Wild, "The Synchronous System Description Language PURR",
    in Open Project Workshop on System Design Automation
    (SDA98), Dresden, Germany, 1998.

Master Thesis (and Studienarbeit)

J. Ruf, "Ein objektorientiertes Framework zur Animation von Algorithmen",
     Studienarbeit, Universität Karlsruhe, 1994. [PS]

Technical reports

J. Ruf, "Formal Verification of Timing Properties of a Holonic ",
    Technical Report WSI-2000-03, Universität Tübingen, Februar 2000 [PS]

S. Flake, W. Mueller, J. Ruf, "An Advanced Visual Capture for Model Checking Specifications",
    Technical Report, C-LAB Report 05/2000, Paderborn, Germany, February 2000.

S. Flake, W. Mueller, J. Ruf, "Mapping of Structured English Sentences to CCTL Formulae",
    Technical Report, C-LAB Report 04/2000, Paderborn, Germany, January 2000.

J. Ruf and T. Kropf, "Using MTBDDs for Composition and Model Checking of Real-Time Systems",
    Tech. Rep. SFB358-C2-1/98, Universität Karlsruhe, Institut für Rechnerentwurf und Fehlertoleranz, January 1998.
    ftp://goethe.ira.uka.de/pub/hvg/techreports/SFB358-C2-1-98.ps.gz

J. Ruf and T. Kropf, "Symbolic Model Checking for a Discrete Clocked Temporal Logic with Intervals",
    Tech. Rep. SFB358-C2-1/97, Universität Karlsruhe, Institut für Rechnerentwurf und Fehlertoleranz, April 1997.
    ftp://goethe.ira.uka.de/pub/hvg/techreports/SFB358-C2-1-97.ps.gz [PS.GZ]

T. Kropf and J. Ruf, "Using MTBDDs for Discrete Timed Symbolic Model Checking",
     Tech. Rep. SFB358-C2-5/96, Universität Karlsruhe, Institut für Rechnerentwurf und Fehlertoleranz, August 1996.
     ftp://goethe.ira.uka.de/pub/hvg/techreports/SFB358-C2-5-96.ps.gz [PS.GZ]