General

Name:	Pradeep Kumar Nalla
Position:	Doctoral Research Candidate
Interests:	Hardware and software system development; Formal, functional, semiformal verification of hardware and software systems; Parallel and distributed verification; Automated formal property generation; UML and MDA; Programming languages; Software engineering; and Documentation.

Curriculum Vitae

Date of Birth
	July 12th, 1979
Nationality
	Indian
Education
2004 - 2008	Doctoral Research Candidate in Technical Computer Science Eberhard-Karls-Universität Tübingen, Germany Formal Methods Group Wilhelm-Schickard-Institut für Informatik
2001 - 2004	Master of Science in Computer Science Dresden University of Technology, Dresden, Germany February 2004: Masters in Computer Science
1996 - 2000	Bachelor of Engineering in Computer Science University of Madras, Chennai, India June 2000: Bachelors in Computer Science
1994 - 1996	Higher Secondary School (Intermediate) Education Nalanda Junior College, Hyderabad, India
1984 - 1994	Secondary School Education Jawaharlal Nehru Memorial High School, Vemulawada, India
Research
2004 - 2008	Joined the Formal Methods Group of the Computer Engineering Department at the University of Tübingen on April 2004. Doctoral research focuses on formal, functional and semiformal verification techniques for hardware/software systems. To be specific: Parallelization of a bounded property checking tool -SymC, using MPI. Property verification tool (SymC) enhancement and optimization. Formal verification of embedded software. Semiformal verification of embedded software. Functional verification using assertions. Parallelization of a Black Box verification - in cooperation with Freiburg University, Germany.
Teaching
2004 - 2008	Courses Assisted(/ing) Summer semester 2008 Type: Seminar Topic: Model based software verification: Basics and Industry practice Summer semester 2007 Type: Seminar Topic: SW Specification, - Test and Verification
Supervision Skills
	During my research studies I have supervised couple of students with their student, diplom and HiWi projects
Employment
April 2004 -	Doctoral Researcher in Formal Methods Group Eberhard-Karls-Universität Tübingen, Germany Formal Methods Group, Computer Engineering Department Wilhelm-Schickard-Institut für Informatik
August 2003 - January 2004	Masters Thesis Student Fraunhofer Institute for Integrated Circuits Design Automation Lab, Dresden, Germany
September 2002 - February 2003	Internship AMD Saxony Dresden Design Center, Dresden, Germany
Industrial Work Experience
September 2008 -	Principal Engineer Atrenta India Atrenta provides solutions to improve and overhaul design efficiency through out the IC design flow. The main products of Atrenta include: Spyglass, Spyglass-CDC, Spyglass-Power, Spyglass-DFT, etc.
August 2003 - January 2004	Masters Thesis Student Fraunhofer Institute for Integrated Circuits Responsibilities & Experience Analyse different HW verification languages like SystemC/SCV, Specman/"e" and OpenVera based on object oriented approach and model them into UML. To create a formal software process for verification development. Define a UML profile suitable for hardware verification. Implement a code generator based on the verification profile. Show a functionality by an example.
September 2002 - February 2003	Internship AMD Saxony, Dresden Design Center Responsibilities & Experience Involvement in planning the UML profile for "e",especially finding relevant mapping of verification domain views into UML artifacts. Modelling aspect orientation into UML. Implementation of e code generator out of UML class diagrams. Integration of a code generator into Rational Rose. Reverse engineering from e to UML class diagrams using Specman/"e".
January 2000 - March 2000	Internship Electronic Corporation of India Limited (ECIL) Responsibilities & Experience To create a database and organization of data regarding LPG Cylinders. Implementation of a front-end GUI for database using Scoopen server 5.
IT Skills
	Software Engineering Software Architecture OO Programming and Design, UML, Design Patterns Functional Programming Internet Technologies (HTML, XML, Protocols) Formal Methods (Model Checking, BDDs, Temporal Logics, Automata Theory) Document Management Systems Programming Languages Imperative: C/C++, Java Declarative: Prolog Functional: Haskell, Ocaml Design: SystemC, Verilog Verification: Specman/"e", OpenVera and SystemC/SCV Various scripting languages Tools Functional HW/SW verification: SCTC (SystemC Temporal Checker) Formal HW verification: SymC, pSymC and RAVEN Formal SW verification: CIL, BLAST, CBMC, C32SAT, CFA2FSM and Modex/Feaver Formal verification of asynchronous/distributed systems: Spin Hardware synthesis: Atrenta's - Spyglass UML Tools: Enterprise Architect, Together, IBM Rational and Tau Generation Database Servers: Oracle, mySQL and PostgreSQL Parallel libraries: MPI, TPO++ LP and MLP Solver: GLPK Graph viewing: Dotty and Tulip Revision control systems: CVS and Subversion Debuggers: GDB, DDD, TotalView and Valgrind Documentation: Latex, Doxygen and UML Operating Systems Windows (NT, 2000, XP, Vista) Unix (Linux, Solaris)
Hands on Parallel Environments
	Kepler Cluster It was a self made cluster at University of Tübingen. The cluster contained 98 computing nodes and each node was configured with dual 650 MHz Pentium-III processors and 1 GB of shared memory (512 MB for each processor). The cluster used BX motherboards and each having a 32 bit/33 MHz PCI bus. The nodes were interconnected with two networks. Ethernet, 100 Mbit, is used to start nodes and processors, while Myrinet is for the direct exchange of messages of the nodes. High Performance Computing Cluster at University of Tübingen This cluster contains 40 computing nodes, each consisting of Intel DualCore 2.66GHz Xeon CPU 5150 (2 CPUs per blade) with 8 Gb of shared memory. Nodes are interconnected with 20 GigaBit Infiniband. A self made test Grid at University of Tübingen This grid was made with three SUN x4100 servers and each machine on the server consists of two dual core AMD Opteron CPUs with 2.4 Ghz, 4 GB of RAM.
Review Skills
	I have assisted our Professors in reviewing and evaluating research papers for conferences and technical reviews for books and workshops. And some of these conferences and workshops include: DATE, ICCAD, TCAD, HLDVT and CODES-ISSS
Languages
	Telugu (native speaker), English (fluent), German (fair), Hindi (good), Tamil (fair)
Organizational Skills and Competences
	Co-chaired and moderator for the session 16th European SystemC User's Group Meeting, FDL 07 conference, September 2007, Barcelona, Spain
Personal Competences
	Efficient utilization of resources. Efficient time and mind management. Good command in combining techniques in order to optimize and enhance efficiency. Good and clear in promoting ideas by both written and oral. Efficient in observing and learning the core content of ideas. Prolific at technical discussion. Actively involved in internal group meetings.
Interests
	English vocabulary, history, lately economics, cricket, youtubing, partying and traveling