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  Jahresberichte
  Abgeschlossene Promotionen
  Literaturliste





Jahresberichte





Abgeschlossene Promotionen


  • Barros, Edna, Dipl.-Ing.
    Hardware/Software Partitioning using UNITY
    16.07.93

  • Beschorner, Klaus, Dipl.-Inform.
    Untersuchungen zur effizienten Kommunikation in komponentenbasierten Client/Server-Systemen
    17.07.2002

  • Bogdan, Martin, Dipl.-Ing.
    Signalverarbeitung biologischer Nervensignale zur Steuerung einer Prothese mit Hilfe künstlicher neuronaler Netze
    15.07.98

  • Bringmann, Oliver, Dipl.-Inform
    Synchronisationsanalyse zur Multi-Prozeß-Synthese
    19.12.2001

  • Bubeck, Tilmann
    Untersuchungen zur Parallelisierung und Ausführung von Programmen in verschiedenen parallelen Speicherarchitekturen
    10.06.98

  • Cechin, Adelmo, Dipl.-Inform.
    The Extraction of Fuzzy Rules from Neural Networks
    17.12.97

  • Eikerling, Heinz-Josef, Dipl.-Inform.
    Optimierung digitaler Entwürfe durch Partitionierung und Resynthese
    23.09.96

  • Eppler, Thomas, Dipl.-Ing. FH
    Bestimmung von Gesichtsmerkmalen zur automatischen Gesichtserkennung in der Zugangskontrolle
    05.02.97

  • Fröhlich, Michael,
    Informationstheoretische Optimierung künstlicher neuronaler Netze
    23.07.2003

  • Gathmann gen. Hüttemann, Stefan
    Untersuchungen über objektorientierte Design-Patterns für massiv-parallele Teilchensimulationsverfahren anhand von Smoothed Particle Hydrodynamics,
    19.12.2001

  • Gebhardt, Alexander, Dipl.-Ing. FH
    Entwurf und Vergleich von Erkennungsverfahren sowie Methoden zum Fotoausschuß für die automatische Gesichtserkennung
    05.02.97

  • Göppert, Josef, Dipl.-Ing.
    Die topologisch interpolierende selbstorganisierende Karte in der Funktionsapproximation
    20.12.96

  • Gutberlet, Peter, Dipl.-Inform.
    Spezifikation und Synthese aus taktfreien VHDL-Verhaltensbeschreibungen
    12.02.1997

  • Hardt, Wolfram, Dipl.-Inform.
    HW/SW-Codesign auf Basis von C-Programmen unter Performanz-Gesichtspunkten
    23.09.96

  • Haug, Gunter
    Emulation synthetisierter Verhaltensbeschreibungen mit VLIW-Prozessoren
    14.02.2001

  • Hedenetz, Bernd
    Entwurf von verteilten fehlertoleranten Elektronikarchitekturen in Kraftfahrzeugen
    06.04.01

  • Heuser, Udo, Dipl.-Inform.
    Automatische Internet-Katalogisierung mit Hilfe des Hierarchischen Radius-basierten Competitive Learnings
    19.07.00

  • Hergenhan, André
    Analytische Modellierung und Bewertung von Prozessoren in eingebetteten Systemen
    14.02.2001

  • Hoffmann, Dirk, Dipl.-Inform.
    Automatic Design Error Correction of Combinational Circuits
    20.12.00

  • Kebschull, Udo, Dipl.-Inform.
    Verhaltensbasierte und spektrale Logiksynthese mehrstufiger Schaltnetze unter Verwendung von Binärbäumen
    08.07.94

  • Koch, Gernot
    Interaktives Debugging von algorithmischen Hardware-Verhaltensbeschreibungen mit Emulation
    10.06.98

  • Köhler, Jürgen, Dipl.-Ing.
    Merkmalsselektion zur Echtzeitdiagnose in Fahrzeug mittels neuronaler Netze
    03.02.98

  • Krug, Markus, Dipl.-Inform.
    Concept and Implementation of a Dependable Automotive Operating System
    03.02.98

  • Lange, Walter
    Synthese von taktgebundenen Verhaltensbeschreibungen
    23.07.2003

  • Ludwig, Lothar, Dipl.-Inform.
    Automatisierte neuronale Netze zur Analyse technischer Daten mit dem Ziel der Qualitätssicherung
    18.07.01

  • Merk, Lothar
    Analyse und Konzeption eines dezentralen Integrationsmodells für Legacy-Systeme
    12.07.2002

  • Rau, Andreas
    Model-Based Development of Embedded Automotive Control Systems
    24.09.02

  • Ritt, Marcus
    Eine objektorientierte Kommunikationsbibliothek zur parallelen Programmierung - TPO++
    23.07.2003

  • Sapojnikova, Elena
    ART-based Fuzzy Classifiers:ART Fuzzy Networks for automatic classification
    17.12.2003

  • Schubert, Endric, Dipl.-Ing.
    Laufzeitoptimierung und Technologieabbildung in der Logiksynthese unter Verwendung von Mehrbereichsdarstellungen boolescher Funktionen
    09.02.96

  • Schubert, Jürgen, Dipl.-Ing.
    Dynamische Lastverteilung mit bekannter Ressourcenanforderung in heterogenen Rechnernetzen und Frameworks
    04.07.96

  • Seepold, Ralf, Dipl.-Inform.
    A Hardware Design Methodology with special Emphasis on Reuse and Synthesis
    09.09.1997

  • Speckmann, Heike, Dipl.-Inform.
    Analyse mit fraktalen Dimensionen und Parallelisierung von Kohonens selbstorganisierender Karte
    08.02.95

  • Wedeck, Jörg, Dipl.-Inform.
    Parallelisierung sequentieller Programme unter besonderer Berücksichtigung von Hardware-Beschleunigern
    20.12.95

  • Weiler, Christoph, Dipl.-Ing.
    Der Einsatz von Java im Bereich eingebetteter Systeme
    18.11.98

  • Weinmann, Ulrich, Dipl.-Ing.
    Verfahren zur Schaltungspartitionierung für programmierbare Bausteine
    14.07.95

  • Wunner, Julia, Dipl.-Math.
    Kommunikation und Synchronisation in einer verteilten Lehrumgebung
    16.07.01




Literaturliste


  1. Camposano, Rosenstiel:
    Synthesizing Circuits from Behavioural Level Specifications
    IEEE Transactions on Computer-Aided Design, S. 171-180, Vol. 8, Nr. 2, Februar 1989

  2. Rosenstiel, Camposano:
    Rechnergestützter Entwurf hochintegrierter MOS-Schaltungen
    Springer Hochschultext, 1989

  3. Deussen, Rosenstiel, Schauser, Wedeck:
    Architecture Design of a RISC-Processor for Prolog
    Microprocessing and Microprogramming, 27, S. 101-108, North-Holland, 1989

  4. Wecker, Kumar, Rosenstiel, Krämer, Neher:
    CALLAS - ein System zur automatischen Synthese digitaler Schaltungen
    Informatik - Forschung und Entwicklung, S. 37-54, Springer-Verlag, 1989

  5. Amann, Neher, Rietsche, Rosenstiel:
    CASTOR: FSM Synthesis in a Digital Circuit Synthesis System
    ESSCIRC, S. 105-108, 1989

  6. Duzy, Krämer, Neher, Pilsl, Rosenstiel, Wecker:
    CALLAS - Conversion of Algorithms to Library Adaptable Structures
    VLSI 89, S. 197-208, 1989

  7. Gutberlet, Krämer, Rosenstiel:
    CASCH - ein Scheduling-Algorithmus für "High-Level"-Synthese
    Informatik Fachberichte, GME/GI/ITG-Fachtagung, Dortmund, 1.-2.10.90, 1990

  8. Krämer, Rosenstiel:
    System Synthesis using Behavioural Descriptions
    IEEE Computer Society Press, EDAC 90, S. 277-282, 1990

  9. Krämer, Rosenstiel:
    Automatic Generation of Single Chip Multi Processor Systems
    IFIP Working Conference on Logic and Architecutre Synthesis, Paris/Frankreich, S. 204-208, 1990

  10. Rudolph, Neher, Rosenstiel:
    Test Scheduling and Controller Synthesis in the CADDY-System
    IEEE Computer Society Press, EDAC 91, S. 278-282, 1991

  11. Rosenstiel, Krämer:
    Scheduling and Assignment in High Level Synthesis
    Trends in High Level VLSI Synthesis, R. Camposano, W. Wolf, (Hrsg.), Kluwer Verlag, S. 355-382, Boston/USA, 1991

  12. Barros, Rosenstiel:
    A Method for Hardware Software Partitioning
    CompEuro 92, 4.-8. Mai 92, S. 580-585, Den Haag 1992

  13. Göppert, Speckmann, Rosenstiel, Kessler, Kraus, Gauglitz:
    Evaluation of Spectra in Chemistry and Physics with Kohonen's Self-Organizing Feature Map
    NeuroNimes, 1992

  14. Gutberlet, Müller, Krämer, Rosenstiel:
    Automatic Module Allocation in High Level Synthesis
    EURO-DAC '92/EURO-VHDL '92, Hamburg, 7.-10. September 92, S. 328-333, 1992

  15. Gutberlet, Rosenstiel:
    Scheduling Between Basic Blocks in the CADDY Synthesis System
    EDAC 92, Brüssel/Belgien, 16.-19. März 92, S. 496-500, 1992

  16. Kebschull, Schubert, Rosenstiel:
    Multilevel Logic Synthesis Based on Functional Decision Diagrams
    EDAC 92, Brüssel/Belgien, 16.-19. März 1992, S. 43-47, 1992

  17. Kwee-Christoph, Eschermann, Kumar, Kunzmann:
    The CADEC VLSI Design Support Methodology
    CompEuro 92, Den Haag, 4.-8. Mai 92, S. 550-555, 1992

  18. Marwedel, Rosenstiel:
    Synthese von Register-Transfer-Strukturen aus Verhaltensbeschreibungen
    Hauptbeitrag Informatik-Spektrum, Springer-Verlag, 15:5-22, 1992

  19. Schubert, Kebschull, Rosenstiel:
    FDD Based Technology Mapping for FPGA
    EURO-ASIC, F-Paris, 1992

  20. Speckmann, Thole, Rosenstiel:
    Hardware Implementation of Kohonen's Selforganizing Feature Map
    ICNN, Brighton/Großbritannien, 1992
    IJCNN, Bejing/China, 1992

  21. Wedeck, Rosenstiel:
    Codegenerierung für parallele Rechensysteme
    37. Internationales Wissenschaftliches Kolloquium, Ilmenau, Sepember 1993

  22. Kebschull, Rosenstiel:
    Efficient Graph-Based Computation and Manipulation of Functional Decision Diagrams
    EDAC/Euroasic 93, Paris/Frankreich, 1993

  23. Brand, Müller, Rosenstiel:
    Design of High Throughput Data Path Components
    4th ACM Phys. Design Workshop, 1993

  24. Barros, Rosenstiel:
    A Clustering Approach to Support Hardware/Software Partitioning
    Computer Aided Software/Hardware Engineering, IEEE Press, 1993

  25. Brand, Müller, Rosenstiel:
    An Efficient Data Path Synthesis Strategy
    SASIMI- Workshop 1993

  26. Göppert, Rosenstiel:
    Topology-Preserving Interpolation in Selforganizing Maps
    Neuro Nimes 93, Nimes/Frankreich, Oktober 1993

  27. Göppert, Rosenstiel:
    Self-organizing Maps vs. Backpropagation: An Experimental Study
    Workshop Design Methodologies for Microelectronics and Signal Processing, Gliwice/Polen, Oktober 1993

  28. Göppert, Rosenstiel:
    Neuronale Netze: Revolutionierende Technik oder des Kaisers neue Kleider?
    Physik und Informatik in Wechselwirkung, Dresden, 1993

  29. Gutberlet, Rosenstiel
    Interface Specification and Synthesis for VHDL Processes
    EURO-DAC, Paris/Frankreich 1993

  30. Göppert, Speckmann, Rosenstiel:
    Evaluation of Interference Spectra with Kohonen's Self-Organizing Map
    International Workshop on Mechatronica Computer Systems for Preception and Action, Halmstad/ Schweden 1993

  31. Hansen, Barros, Rosenstiel:
    A Comparison of some Specification Mechanisms to support Hardware/Software Codesign
    Second IFIP International Workshop on Hardware/Software Codesign Codes/CASHE 93, Innsbruck/Österreich, 1993

  32. Kebschull, Endric Schubert, Thole, Rosenstiel:
    The Design and Implementation of an Educational Computer System Based on FPGAs
    Eurochip Workshop on VLSI Design Training, Toledo/Spanien, 1993

  33. Rosenstiel
    Experiences with High-Level Synthesis from VHDL-Specifications
    Proc. of Workshop on Design Methodologies for Microelectronics and Signal Processing, Gliwice/Polen, Oktober 1993

  34. Schubert, Kebschull, Rosenstiel
    Some Optimizations for Functional Decision Diagrams
    IFIP WG 10.5 Workshop on Applications of the Reed-Muller Expansion in Circuit Design, Hamburg, Interner Bericht Universität Tübingen, WSI-93-2, 1993

  35. Schubert, Kebschull, Rosenstiel:
    The Use of FPGA for Educational Purposes in VLSI Microprocessor Design
    FPL-93, Oxford, 1993

  36. Speckmann, Thole, Rosenstiel:
    Synthesizing Hardware for Neural Networks with CADDY/CALLAS
    Workshop on Design Methodologies for Microelectronics and Signal Processing, Gliwice/Poland, Oktober 1993,
    VHDL Users Forum, San Jose/Kalifornien/USA, 1993

  37. Speckmann, Rosenstiel:
    Parallele Implementierung Neuronaler Netze: Anforderungen und Vergleich
    E.I.S. Workshop, Tübingen, 1993

  38. Speckmann, Thole, Rosenstiel:
    A Coprocessor for Kohonen's Selforganizing Map (COKOS)
    IJCNN93, Nagoya/Japan, 1993

  39. Speckmann, Thole, Rosenstiel:
    Hardware Synthesis for Neural Networks from a Behavioural Description with VHDL
    IJCNN93, Nagoya/Japan, 1993

  40. Thole, Speckmann, Rosenstiel:
    A Hardware Supported System for Kohonen's Selforganizing Map
    3rd Int. Conference on Microelectronics for Neural Networks, Edinburgh, UK, April 1993
    International Conference on Artificial Neural Networks, Amsterdam/Niederlande 1993

  41. Thole, Speckmann, Rosenstiel:
    Synthesizing Hardware for Neural Networks with CADDY/CALLAS
    APCHDLSA 93, Queensland/Australien, 1993

  42. Barros, Rosenstiel, Xiong:
    Hardware/Software Partitioning with UNITY
    International Workshop on Hardware-Software Co-Design, Cambridge/Massachusetts/USA, Oktober. 1993

  43. Weinmann, Rosenstiel
    Technology Mapping for Sequential Circuits Based on Retiming Techniques
    EURO-DAC 93, Hamburg, September 1993

  44. Brand, Müller, Rosenstiel:
    Effizienter Entwurf leistungsfähiger Datenpfadkomponenten mit LORTGEN
    E.I.S.-Workshop '93, Tübingen, 1993

  45. Thole, Kebschull, Rosenstiel:
    Klassische und High-Level-Synthese eines einfachen Mikroprozessors
    E.I.S.-Workshop, Tübingen 1993

  46. Wedeck, Rosenstiel, Trautwein:
    Optimierung und Parallelisierung von Programmen auf der Ebene von Flußgraphen
    ITG/GI 1993

  47. Speckmann, Rosenstiel:
    Ein Hardwarebeschleuniger für neuronale Netzanwendungen
    Cebit ³93, Hannover, März 1993

  48. Weinmann, Rosenstiel
    Technology Mapping for Sequential Circuits based on Retiming Techniques
    EURO-DAC, 1993

  49. Rosenstiel, Kebschull, Bubeck:
    Sparrow - Ein Mikroprozessor-Entwurfs- und Ausbildungssystem
    Hochschul-Computer-Forum, Berlin 1993

  50. Gutberlet, Rosenstiel:
    Timing Preserving Interface Transformations for the Synthesis of Behavioural VHDL
    EURO-DAC '94, Grenoble/Frankreich, September 1994

  51. Wendling, Rosenstiel, Mauer:
    A Hardware Environment for Prototyping and Partitioning Based on Multiple FPGAs
    EURO-DAC '94, Grenoble/Frankreich, September 1994

  52. Speckmann, Raddatz, Rosenstiel:
    Considerations of Geometrical and Fractal Dimension of SOM to get Better Learning Results
    ICANN ³94, Sorrento/Italien, 1994

  53. Göppert, Rosenstiel:
    Dynamic Extensions of Self-Organizing Maps
    ICANN ³94, Sorrento/Italien, 1994

  54. Schubert, Rosenstiel:
    Synthese von Register-Transfer-Elementen mit VHDL für die High-Level-Synthese
    SMT/ASIC, Nürnberg 1994

  55. Kebschull, Rosenstiel:
    Graph-Based Representations of Boolean Canonical Forms
    GI/ITG-Workshop, Frankfurt, 1994

  56. Wedeck, Rosenstiel:
    Compiling C Programs into Threads
    International Conference Massively Parallel Processing Applications and Development, Delft/Niederlande, Juni 1994

  57. Brand, Müller, Rosenstiel:
    Specification and Synthesis of Complex Arithmetic Operators for FPGAs
    4th International Workshop on Field Programmable Logic and Applications, Prag 1994

  58. Endric Schubert, Kebschull, Rosenstiel
    Functional Decision Diagrams for Technology Mapping to Lookup-Table FPGA
    2nd Int. Workshop on FPGA, Berkeley, February, 1994

  59. Weinmann, Rosenstiel
    Logic Module Independent Mapping for Table-Lookup FPGAs
    ACM/SIGDA Workshop on FPGAs, Berkeley, 1994

  60. Weinmann, Rosenstiel
    Ein Partitionierungsystem für FPGA-Prototypenrealisierungen
    FPGA-Workshop, Karlsruhe, 1994

  61. Weinmann, Rosenstiel
    Network Flow base Clustering and Partitioning for FPGAs
    IFIP-Workshop on Logic and Archt. Synth., Grenoble, 1994

  62. Rosenstiel, Göppert:
    Neuronale Netze: Anwendung in der Reflexionspektroskopie
    CeBIT³94, Hannover, März 1994

  63. Göppert, Rosenstiel
    Use of neural networks in on-line analysis
    Fresenius' Journal of Analytical Chemistry, Springer-Verlag 1994, 349:367-371

  64. Speckmann, Raddatz, Rosenstiel
    Considerations of geometrical and fractal dimension of SOM to get better learning results
    Proc. of ICANN '94, Sorrento, Springer, London, 1994

  65. Bogdan, Speckmann, Rosenstiel
    KOBOLD - A Neural Coprocessor for Backpropagation with Online Learning
    -     ICANN '94, Sorrento / Italien 1994
    - MicroNeuro 94

  66. Gutberlet, Rosenstiel
    Interface Specification and Synthesis for VHDL Processes
    7th Int. Symp. on High-Level Synthesis, IEEE, Niagara-on-the-Lake, Ontario, Canada 1994

  67. Speckmann, Raddatz, Rosenstiel
    Improvement of learning results of the selforganizing map by calculating fractal dimensions
    ESANN, B-Brüssel, 1994

  68. Ludwig, Göppert, Rosenstiel
    Topological Interpolation for the Training of Self-Organizing Maps
    FUZZY, Dortmund 1994

  69. Bubeck, Rosenstiel
    Eine Systemumgebung zum verteilten funktionalen Rechnen
    (eingereicht)

  70. Koch, Kebschull, Rosenstiel
    A Prototyping Environment for Hardware/Software Codesign in the COBRA Project
    CODES/CASHE, Grenoble, 1994

  71. Xiong, Barros, Rosenstiel
    A Method for Partitioning UNITY Language in Hardware and Software
    EURO-DAC, Grenoble, 1994

  72. Wilberg, Rosenstiel, et al.
    Design Flow for Hardware/Software Cosynthesis of a Video Compression System
    CODES/CASHE, Grenoble 94

  73. Thole, Rosenstiel
    Exercises on High Level Design Automation
    5th Eurochip Workshop on VLSI Design Training, Dresden, 1994

  74. Bubeck, Rosenstiel
    Verteiltes Rechnen mit DTS (Distributed Thread System)
    SIPAR Workshop, CH-Fribourg, 1994

  75. Kessler, Göppert, Rosenstiel
    Prediction of Oxide Layer Thickness by a Topology Preserving Interpolation Method in a self-organizing Map
    In: Advances in AI - Theory and Application II, Seiten 99 - 104, Ontario, 1994.

  76. Kraus, Göppert, Rosenstiel, Gauglitz
    Neuronale Netze in der chemischen Analytik
    GIT Fachz. Lab, 10/94

  77. Koppenhöfer, Epperlein, Christian, Göppert, Rosenstiel
    Classification of Molecular Recognition by a Kohonen Feature Map
    - Cell Adhesion 3D-databases in Drug Design, Antibodies in Drug Design, Schliersee, October 26-28, 1994
    - International Symposium on Capillary Chromatography and Electrophoresis, Wintergreen, VA, USA, May 1995

  78. Brand, Müller, Rosenstiel
    Eine Bewertungsmethodik für arithmetische Operatoren
    GME-Fachtagung "Mikroelektronik", Baden-Baden, 1995

  79. Cechin, Göppert, Rosenstiel
    The use of Neural Networks to estimate Gas Concentrations
    Neural Networks & Their Applications, F-Marseille, December 15-16, 1994

  80. Bogdan, Rosenstiel
    Artificial neural nets for Peripheral Nervous System - remote Limb Prostheses
    Neural Networks & their Applications, F-Marseille, December 15-16, 1994

  81. Göppert, Rosenstiel
    Selective Attention and Self-Organizing Maps
    Neural Networks & their Applications, F-Marseille, December 15-16, 1994

  82. Eva Schubert, Thole, Rosenstiel
    Exercises with the Votan High-Level Synthesis System
    EUROCHIP Course on High-Level Digital System Design, August 29-September 8 1994, IMEC, Leuven, Belgium

  83. Speckmann, Raddatz, Rosenstiel
    Relations Between Generalized Fractal Dimensions and Kohonen³s Self-Organizing Map
    Neural Networks and their Applications, Marseilles, 15-16 December 1994

  84. Eikerling, Schmidt, Rosenstiel
    Anwendung symbolischer Techniken zur flächenminimierenden HW-Resynthese
    In: 7. E.I.S. Workshop, Chemnitz, Germany, Nov. 95
    auch: Technical Report SFB 358 - B 3 - 1/ 95 at TU Dresden

  85. Hardt, Merker, Kortke, Fimmel, Trautwein, Wedeck, Rosenstiel
    Automatisierter Entwurf von Varianten eines HW/SW - Systems
    Technical Report SFB 358 - AB - 1/ 95; University of Paderborn, Technical University of Dresden, University of Tübingen, 1995.

  86. Eikerling, Schmidt, Rosenstiel
    A Fully Symbolic Framework For Area-minimizing Hardware Resynthesis
    In: 7. IFIP TC 10, WG 10.5 Workshop on Logic and Architecture Synthesis, Grenoble, France, December 1995.
    auch: Technical Report SFB 358 - B3 - 2/95 at TU Dresden)

  87. Göppert, Rosenstiel
    Topological Interpolation in SOM by Affine Transformations
    ESANN '95, B-Bruxelles, April 19-21, 1995

  88. Koch, Kebschull, Rosenstiel
    System Validation by Source Level Emulation of Behavioral VHDL Specifications
    6th IEEE Intern. Workshop on Rapid System Prototyping, Chapel Hill, N. C., USA, 7-9 June 1995

  89. Koch, Kebschull, Rosenstiel
    Debugging Behavioral VHDL Specifications by Source Level Emulation
    Eurodac '95, GB-Brighton, September 18-22, 1995

  90. Weinmann, Bringmann, Rosenstiel
    Device Selection for System Partitioning
    Eurodac '95, GB-Brighton, September 18-22, 1995

  91. Schubert Jürgen, Kunzmann, Rosenstiel
    Reduced Design Time by Load Distribution with CAD Framework Methodology Information
    Eurodac '95, GB-Brighton, September 18-22, 1995

  92. Ludwig, Kessler, Göppert, Rosenstiel
    SOM with Topological Interpolation for the Prediction of Interference Spectra
    In Bulsari, Kallio, eds, Engineering Applications for Artificial Neural networks, p. 379-389, EANN '95, SF-Helsinki, Finnland 1995

  93. Brand, Müller, Rosenstiel
    Eine Bewertungsmethodik für arithmetische Operatoren
    GME, VDE/VDI, Mikroelektronik, Baden-Baden, 20.-22. März 1995

  94. Göppert, Rosenstiel
    Neurons with Continuous Varying Activation in Self-Organizing Maps
    Intern. Workshop on Artificial Neural Networks, E-Malaga-Torremolinos, Spain, June 7-9, 1995
    J. Mira and F. Sandoval, eds., From Natural to Artificial Neural Computation, vol. 930 of Lecture Notes in Computer Science, p. 416-426, Springer Vg., 1995

  95. Göppert, Rosenstiel
    Interpolierte Selbstorganisierende Karte in der Funktionsapproximation
    In: Bocklisch, S.F. (Hrsg.): Technologien und Neuronale Netze in der Praxis, ISBN 3-8265-1481-5, S. 77-86, Aachen, 1995. Shaker Verlag.

  96. Göppert, Rosenstiel
    Interpolation in SOM:Improved Generalization by Iterative Methods.
    In: Proceedings of ICANN 95, S. 425-434, Paris, France 10 / 95. EC. & Cie.

  97. Eva Schubert, Rosenstiel
    Fläche-Zeit-Modellierung von Register-Transfer-Komponenten für die High-Level-Synthese
    7. E.I.S.-Workshop, Chemnitz-Zwickau, 7.-8. November 1995

  98. Wilberg, Kuth, Camposano, Rosenstiel, Vierhaus
    Design Exploration in CASTLE
    in deMicheli, Otten, Vierhaus: "Workshop on High Level Synthesis Algorithms Tools and Design (HILES), GMD-Studien, vol. 276, Stanford University, Nov, 1995

  99. Barros, Rosenstiel
    A Clustering Approach to Support Hardware/Software Partitioning
    Codesign - Computer - Aided Software/Hardware Engineering, ed. Jerzy Rosenblit and Klaus Buchenrieder, S. 230-262, IEEE Press, 1995

  100. Weiler, Kebschull, Rosenstiel
    C++ Base Classes for Specification, Simulation and Partitioning of a Hardware/Software System
    VLSI '95, Japan

  101. Fang, Thole, Göppert, Rosenstiel
    A Hardware Supported System for a Special Online Application of Self-organizing Map
    Chemnitzer Kolloquium, 29./30.November.1995 und
    Proc. ICNN '96, Int Conf. On Neural Networks, vol II, p. 956-961, Piscataway, NJ, 1996. IEEE Service Center

  102. Bogdan, Babanine, Kaniecki, Rosenstiel
    Nerve Signal Processing using Artificial Neural Nets
    IPCAT '95, Liverpool, S. 55-68, Sept. 6-8,1995

  103. Bubeck, Küchlin, Rosenstiel
    Symmetric Distributed Computing with Dynamic Load Balancing and Fault Tolerance
    3rd Workshop on Languages, Compilers and Run-Time Systems for Scalable Computers, Troy, New York, USA, May 1995

  104. Hansen, Ditzinger, Rosenstiel
    Schaltungs-Synthese mit VHDL - Erfassung der Entwurfsprobleme durch richtige Auswahl der subsets
    CADS & SMT, 2/95.

  105. Bubeck, Rosenstiel
    Parallelisierung auf Workstations-Clustern mit dem Distributed Threads System (DTS)
    Mackens, Rump (eds), Proc. of Software Engineering in Scientic Computing, Hamburg, Juni 1995

  106. Bubeck, Rosenstiel
    Functional Parallelism on Workstation Clusters
    Universität Tübingen, SFB 382, Nr. 25, September 1995

  107. Seepold, Kunzmann, Rosenstiel
    A Unified Approach for Hardware/Software-Reuse
    International Workshop on Logic and Architectural Synthesis, p. 283-288, Grenoble (France), Dec. 1995

  108. Seepold, Kunzmann, Rosenstiel
    Comprehensive Reuse Techniques in CAD
    11th ISPE/IEE/IFAC Intern. Conference on CAD/CAM, Robotics and Factories of the Future CARS and FOF, 1:376-381, Pereira (Columbia), Aug. 1995

  109. Eikerling, Hardt, Gerlach, Rosenstiel
    A Methodology for Rapid Analysis and Optimization of Embedded Systems
    International IEEE Symposium and Workshop on ECBS, D-Friedrichshafen, March 11-15, 1996, pp. 252-259

  110. Gerlach, Eikerling, Hardt, Rosenstiel
    Von C nach Hardware: ein integratives Entwurfskonzept
    In: 1. GI/ITG/GMM Workshop Allgemeine Methodik von Entwurfsprozessen, Paderborn, Germany, March 1996. auch: Technical Report SFB 358 - B3 - 3/ 96.

  111. Hardt, Rosenstiel
    Prototyping of Tightly Coupled Hardware/Software-Systems
    In Design Automation for Embedded Systems, 1996
    auch: Technical Report SFB 358 - B 3 - 4/ 96 at TU Dresden.

  112. Fang, Thole, Göppert, Rosenstiel
    A Hardware Supported System for a Special Online Application of Self-organizing Map
    ICNN '96, IEEE International Conference on Neural Networks, Washington DC, USA, June 3-6, 1996

  113. Göppert, Rosenstiel
    Varying Cooperation in SOM for Improved Function Approximation
    ICNN '96 Int. Conf. On Neural Networks, vol. 1, p. 1-6, Piscataway, NJ, 1996. IEEE Service Center

  114. Cechin, Epperlein, Rosenstiel, Koppenhöfer
    The Extraction of Sugeno Fuzzy Rules from Neural Networks
    - ESANN '96, B-Bruges, Belgium, April 24-16, 1996
    - Proceedings of the Rule Extraction From Trained Artificial Neural Networks Workshop, Brighton, UK, April, 1996
    - "Rules and Networks". Proceedings of the rule extraction from trained artificial neural networks Workshop, (Andrews, R., Diederich, J.: Editors), Queensland University of Technology, Queensland, Australia, 1996, 49-54.
    - "Solving Engineering Problems with Neural Networks. Proceedings of the EANN 96 - Engineering Applications of Artificial Neural Networks" ( Bulsari, A.B.; Kallio, S.; Tsaptsinos, D.: Editors) Systeemitekniikan seura ry, Finland, 1996, 107-110.

  115. Cechin, Epperlein, Rosenstiel, Koppenhöfer
    Fuzzy Rules Extraction from Neural Networks Applied to Molecular Recognition
    Int. Conference on Engineering Applications of Neural Networks (EANN), UK-London, June 17-19,1996

  116. Hardt, Gerlach, Eikerling, Rosenstiel, Gregory
    Using the HDL-Advisor for Shortening the System Design Loop
    In SNUG 96, Geneva, Switzerland, Sept. 96
    auch: Technical Report SFB 358 - B 3 - 6/ 96 at TU Dresden

  117. Xiong, Gutberlet, Rosenstiel
    Automatic Generation of Interprocess Communication in the PARAGON System
    7th IEEE International Workshop on Rapid System Prototyping, June 19-21 1996, Porto Caras, Thessaloniki, Greece

  118. Rosenstiel, Bogdan
    Neuronale Netze: Nervengesteuerte Prothese
    HannoverMesse '96, 22.-26.04.96, Exponat
    Handout Medica '97, Düsseldorf, Nov. 97

  119. Koppenhoefer, Epperlein, Christian, Göppert, Rosenstiel
    Classification of Enantiomer Separation by Neural Networks
    Analytica 96, München, Germany, April 23-26, 1996

  120. Koppenhoefer, Epperlein, Schlunk, Cechin, Rosenstiel
    Prediction of GC Enantiomer Separation by Neural Networks
    Analytica 96, München, April 1996

  121. Crämer, Göppert, Rosenstiel
    Modeling Psychological Stereotypes in Self-Organizing Maps
    In c. von der Malsburg et al., eds., Artificial neural networks - ICANN '96, Bochum, 16.-19. Juli 1996, Volume 1112 of Lecture Notes in Computers Science, p. 905-910, Berlin Germany 1996, Springer Verlag

  122. Heuser, Göppert, Rosenstiel, Stevens
    Classification of Human Brain Waves using Self-Organizing Maps
    ECAI 96, (IDAMAP 96-Workshop), p. 37-42, Hungary-Budapest, Aug. 12-16, 1996
    Kluwer Academic Publishers, Boston, p. 279-294, 1997

  123. Bullmann, Kebschull, Rosenstiel, Schubert
    Library Based Technology Mapping Using Multiple Domain Representations
    EURO-DAC, CH-Geneva, 16.-29.09.1996

  124. Eikerling, Rosenstiel
    Automatic Structuring and Optimization of Hierarchical Designs
    EURO-DAC, CH-Geneva, 16.-29.09.1996
    und Technical Report SFB 358, B3, TU Dresden, 7/96

  125. Hardt, Rosenstiel
    Speed-up Estimation for HW/SW-Systems
    CODES/CASHE, USA-Pittsburgh, PA, 1996

  126. Lange, Thole, Rosenstiel
    Modellierung einer ATM-Switch-Steuerung mit anwendungsspezifischen Funktionen
    GI/ITG-Workshop "Custom Computing",ed. D. Monjau, p. 73-81, Schloß Dagstuhl, 18.-21.05.96

  127. Babanine, Rosenstiel
    Vosstanovlenie cvetov v skanirovannych izobrazenijach s pomosju meironnych setei: osobennosti realizacii (Restoration of Colours in Scanned Images using Artificial Neural Networks: Particularities of the Realisation. In Russian)
    XXVII Conf. on the Control of Dynamic Systems, April 20-25, 1996, St. Petersburg, Russia

  128. Koppenhoefer, Epperlein, Schlunk, Ludwig, Cechin, Rosenstiel
    Retrieval, Classification and Prediction of Enantiomer Separation by Neural Networks
    EUROANALYSIS IX, I-Bologna, Italy, September 1-7, 1996

  129. Schweizer-Berberich, Göppert, Hierlemann, Mitrovics, Weimar, Rosenstiel, Göpel
    Applications of Neural Network Systems to the Dynamic Response of Polymer-Based Sensor Arrays
    Sensors and Actuators, B (26-27): 232-236, 1995

  130. Göppert, Rosenstiel
    Regularized SOM-Training: A Solution to the Topology-Approximation Dilemma?
    Proc. of ICNN '96 (Int. Conf. on Neural Networks), vol. 1, p. 38-43, Piscataway, NJ, 1996. IEEE Service Center

  131. Bogdan, Rosenstiel
    Classification of Nerve Signals using Kohonen³s Self-Organizing Map
    1st International Conference on Bioelectromagnetism, June 9-13, 1996, Tampere, Finland, Medical & Biological Engineering & Computing, vol 34, Supplement 1, Part 2, 1996

  132. Trautwein, Rosenstiel
    Regelung der Granularität paralleler verteilter Algorithmen
    in MMB-Mitteilungen, Messung, Modellierung und Bewertung von Rechensystemen, No. 29, Frühjahr 1996, S. 16-20

  133. Kuhn, Kebschull, Thole, Schubert, Rosenstiel
    Bibliotheksorientierte Technologieabbildung synthetisierter Datenpfade
    2. GI/ITG Workshop "Anwenderprogrammierbare Schaltungen", 22.-23. Juni 1995, Karlsruhe, FZI-Publikation 2/95

  134. Gebhart, Eppler, Rosenstiel
    Erweiterte Methoden zur automatischen Gesichtserkennung
    Universität Tübingen, Wilhelm-Schickard-Institut, interner Bericht, WSI-96-20, ISSN 0946-3852

  135. Kunzmann, Seepold
    An Alternative View on Weighted Random Pattern Testing
    IEEE Proceedings ASIC Conference, New York, September 1996.

  136. Wilberg, Kuth, Camposano, Rosenstiel, Vierhaus
    A Design Exploration Environment
    GLS-VLSI '96

  137. Gerlach, Eikerling, Hardt, Rosenstiel
    Ein Transformations-basiertes Werkzeug für die schnelle Analyse und Optimierung eingebetteter Systeme
    2. GI/ITG/GME Workshop: "Methoden des Entwurfs und der Verifikation digitaler Systeme", Darmstadt 15./16.2.96

  138. Grundmann, Bubeck, Rosenstiel
    Automatisches Generieren von DTS-Kopierfunktionen für C
    Universität Tübingen, Wilhelm-Schickard-Institut, interner Bericht, WSI-96-22, ISSN 0946-3852; Technical Report 48, Uni Tübingen, SFB 382, 1996

  139. Hansen, Kunzmann, Rosenstiel
    Re-use of Test Vectors for High Level Verification
    High Level Sedign Validation and Test Workshop '96, USA-Oakland (CA)

  140. Bogdan, Rosenstiel
    Intelligent Neural Interface - Signalprocessing Nerve Signals using Artificial Neural Nets
    Invited Paper, BioNET 96, Berlin 1996, ISBN 3-00-001 107-2, 1996

  141. Hüttemann, Bubeck, Rosenstiel
    SPH on NEC SX4/32 using DTS
    SIPAR Workshop 96, p. 19-22, Univ. of Geneva (CH), 1996

  142. Bubeck, Schreiner, Rosenstiel
    Timing multi-threaded Message-Passing Programs
    In: C.A. Héritier ( Hrsg.) SIPAR, SIPAR - Workshop 1996, Geneva, October 1996.

  143. Bogdan, Speckmann, Rosenstiel
    Chips and Computers for Artificial Neural Nets
    In: Sensors Update, p. 105-117, J. Hesse, VCH Verlagsgesellschaft, 1996

  144. Schlunk, Koppenhöfer, Cechin, Rosenstiel, Epperlein
    Are there any rules in Chiral Separation? IV: Unprecedented Prediction of GC Data by Neural Networks.
    21st International Symposium on Chromatography, Stuttgart, Sept. 15-20, 1996.

  145. Bringmann, Engelhart, Kumar, Mößner, Rosenstiel
    Design of an Interrupt Controller with AC-8 Tools at Different Levels of Abstraction
    International Workshop on Logic and Architecture Synthesis, 16-18 Dec. 1996, Grenoble (France)

  146. Gernot Koch (Corresponding Author), Udo Kebschull, Wolfgang Rosenstiel
    Breakpoints and Breakpoint Detection in Source Level Emulation
    Tagung ISSS, La Jolla, USA, Nov. 1996

  147. Bogdan, Babanine, Kaniecki, Rosenstiel
    Nerve Signal Processing Using Artificial Neural Nets
    Computation in Cellular and Molecular Biological Systems; Roy Cuthberston, Mike Holcombe, Ray Paton (Eds), Worls Scientific Publishing Co. Pte. Ltd., ISBN 981-02-2878-3, 1996

  148. Koppenhöfer, Schlunk, Cechin, Rosenstiel, Epperlein
    Are There Any Rules in Chiral Separation? IV: Unprecedented Prediction of GC Data by Nerual Networks
    21st Intern. Symposium on Chromatography, Stuttgart (Germany), Sept. 15-20, 1996

  149. Seepold, Kunzmann, Rosenstiel
    Hardware Design Methodology for Efficient Reuse
    2nd World Conference on Integrated Design and Process Technology, p. 423-430, Austin (Texas, USA), Dec. 1996

  150. Reutter, Mößner, Kreuzer, Rosenstiel
    Wiederverwendung komplexer Komponenten für Synthese und Simulation unter Verwendung von VHDL
    8. E.I.S.-Workshop, Hamburg (Germany), April 8- 9, 1997

  151. Hansen, Gutberlet, Kunzmann, Rosenstiel
    Automatischer Taktzyklenabgleich zur Simulation in der High-Level Synthese
    Workshop: Hardwarebeschreibungssprachen und Modellierungsparadigmen, Holzau,
    Deutschland, Februar 1997

  152. Fang, Thole, Rosenstiel
    Hardware-Software Co-Entwurf für Kohonen's SOM
    8. E.I.S.-Workshop, Universität Hamburg (Germany), 8. und 9. April 1997

  153. Wilberg, Kuth, Rosenstiel, Vierhaus
    A Design Management System for the WWW
    8. E.I.S.-Workshop, Universität Hamburg (Germany), 8. und 9. April 1997

  154. Thole, Rosenstiel
    Speicherallokation vor der High Level Synthese mit Profilinginformationen
    8. E.I.S.-Workshop, Universität Hamburg (Germany), 8. und 9. April 1997

  155. Buchholz, Kebschull, Rosenstiel
    Emulation komplexer synthetisierter Schaltungen auf Signalprozessoren
    8. E.I.S.-Workshop, Universität Hamburg (Germany), 8. und 9. April 1997

  156. Theißinger, Vierhaus, Rosenstiel
    Kombinierte Registerzuordnung und Instruktionsablaufplanung für irreguläre Architekturen
    8. E.I.S.-Workshop, Universität Hamburg (Germany), 8. und 9. April 1997

  157. Seepold, Kunzmann, Rosenstiel
    Eine effiziente objekt-orientierte Wiederverwendungsmethode für den Hardware-Entwurf
    8. E.I.S.-Workshop, Universität Hamburg (Germany), 8. und 9. April 1997

  158. Rosenstiel, Cechin
    Neuronale Netze: Wissensextraktion aus Neuronalen Netzen
    Handout CEBIT, Hannover (Germany), März 1997

  159. Rosenstiel, Babanine
    Wiederherstellung von Farben mit Neuronalen Netzen
    Handout CEBIT, Hannover (Germany), März 1997

  160. Rosenstiel, Bogdan
    Neuronale Netze: Nervengesteuerte Prothese
    Handout CEBIT, Hannover (Germany), März 1997

  161. Ludwig, Epperlein, Kuge, Federl, Koppenhöfer, Rosenstiel
    Classification of 'Fingerprints' of Process Control Monitoring-Data with Self-organizing Maps
    Proc. of EANN '97, Stockholm (Sweden), June 1997

  162. Göppert, Rosenstiel
    The Continuous Interpolation Self-organizing Map
    Neural Processing Letters Volume 5, no 3, pages 185-192, Kluwer Academic Publishers, Dordrecht (Netherlands), June 1997

  163. Weiß, Hergenhan, Rosenstiel
    Systematischer Entwurf und Test eingebetteter Systeme am Beispiel eines ATM-Diagnosesystems
    GI/ITG-Workshop: Zielarchitekturen Eingebetteter Systeme, D-Rostock, Sept 8-11, 1997

  164. Koppenhoefer, Epperlein, Goeppert, Rosenstiel
    Classification of Molecular Properties in Nonlinear Optics by a Kohonen Map
    11. CIC-Workshop, D-Paderborn, 17.-19.11.1996, GDCH, 1996

  165. Koch, Kebschull, Rosenstiel
    Co-Emulation and Debugging of HW/SW-Systems
    10th Intern. Symposium on System Synthesis (ISSS 97), B-Antwerpen, Sept. 17-19, 1997

  166. Koppenhöfer, Würthner, Ludwig, Rosenstiel
    Analysis of Electrical Test Data Using a Neural Network Approach
    Kongreßbeitrag IEEE/SEMI ASMC, Cambridge, USA, 1997, pp. 37- 41

  167. Babanine, Cechin, Resch, Rosenstiel
    Artificial Neural Networks for the Restoration of Colours in Scanned Images
    Proc. To IMACS'97, Berlin, August 24-29, 1997, Vol. 4, pp. 331-336, August 24-29, 1997

  168. Bogdan, Harsch, Gross, Göpel, Rosenstiel
    Processing of Nerve Cell Signal Recordings from Cultured Networks using Artificial Neural Nets
    IASTED Artificial Intelligence and Soft Computing, pp 360-363, Banff, Canada, July 27-August 1, 1997

  169. Gerlach, Rosenstiel
    Ein skalierbarer Ansatz zur Kostenabschätzung für die Steuerung von High-Level Transformationen
    WSI 97-5, SFB 358, Universität Tübingen, D- Tübingen, Sept. 1997

  170. Rosenstiel
    Embedded Systems on a Chip
    11th German-Japanese Forum on Information Technology, 11.11.1997, Nagano, Japan 97

  171. Antreich, Rammig, Rosenstiel, Schmid, Waldschmidt
    DFG-Schwerpunktprogramm: "Entwurf und Entwurfsmethodik eingebetteter Systeme"
    informatik aktuell, 27. Jahrestagung der Gesellschaft für Informatik, pp 93-101, Springer Verlag, D-Aachen, Sept. 24.-26, 97

  172. Bringmann, Rosenstiel
    Resource Sharing in Hierarchical Synthesis
    ICCAD, USA-San José, CA, Nov, 9-13, 1997

  173. Bogdan, Cechin, Breit, Rosenstiel
    Cultured Nerve Cell Networks as Biosensor using Artificial Neural Nets
    Seizième Colloque sur le Traitement du Signal et des Images, pages 51-54, F-Grenoble, Sept 1997

  174. Bogdan, Rosenstiel
    Real Time Processing of nerve Signals for Controlling a Limb Prostheses
    Proceedings of IPCAT (Information Processing in Cells and Tissues), pages 26-38, Uni Sheffield (GB), Sept. 1997

  175. Maciel, Barros, Rosenstiel
    Using Petri Nets to Compute Communication Costs for Hardware/Software Codesign
    X Brazilian Symposium on Integrated Circuit Design-SBCCI, pages 253-262, Gramado-RS-Brazil, Aug. 25-27, 1997

  176. Maciel, Barros, Rosenstiel
    Computing Communication Cost by Petri Nets for Hardware/Software Codesign
    Rapid System Prototyping Proceedings, Capel Hill, North Carolina, USA, June 24-26, 1997

  177. Hardt, Rosenstiel
    Prototyping of Tightly Coupled Hardware/Software-Systems
    Design Automation for Embedded Systems, Vol 2, No.3/4, pages 283-317, Kluwer Academic Press, Netherland, May 1997

  178. Heuser, Göppert, Rosenstiel, Stevens
    Classification of Human Brain Waves using Self-Organizing Maps
    Intelligent Data Analysis in Medicine and Pharmacology, edited by N. Lavrac,
    E. Karavnou, B. Zupan, The Kluwer International Series in Engineering and Computer Science, Vol. 414, September 1997, Kluwer Academic Publishers, USA-Boston, pp 279-294, September 1997

  179. Lange, Rosenstiel
    Modellierung einer ATM-Switch-Steuerung
    Universität Tübingen, Wilhelm-Schickard-Institut, interner Bericht, WSI-96-6, ISSN 0946-3852, 1997

  180. Bringmann, Rosenstiel
    Cross-Level Hierarchical High-Level Synthesis
    1998 EEEE,
    Design, Automation and Test in Europe Conference and Exhibition (DATE'98), F-Paris (France), Febr. 23-26, 1998

  181. Gerlach, Rosenstiel
    A Scalable Methodology for Cost Estimation in a Transformational High-Level Design Space Exploration Environment
    Design, Automation and Test in Europe Conference and Exhibition (DATE'98), F-Paris (France), Febr. 23-26, 1998

  182. Hansen, Kunzmann, Rosenstiel
    Verification by Simulation Comparison using Interface Synthesis
    Design, Automation and Test in Europe Conference and Exhibition (DATE'98), F-Paris (France), Febr. 23-26, 1998

  183. Martin, Rosenstiel
    A Comparing Study of Technology Mapping for FPGA
    Design, Automation and Test in Europe Conference and Exhibition (DATE'98), F-Paris (France), Febr. 23-26, 1998

  184. Rosenstiel, Ludwig
    Neuronale Netze in Industrie und Forschung
    Handouts CeBIT, Hannover, 1998

  185. Heuser, Babanine, Rosenstiel
    HTML Documents Classification using (Non-linear) Principal Component Analysis and Self-Organizing Maps
    Neurap'98 - Fourth International Conference on Neural Networks and their Applications, F-Marseille, March 11-19, 1998

  186. Gerlach, Rosenstiel
    Eine Umgebung zur transformationalen Entwurfsraum-Exploration
    GI/ITG/GMM Workshop 'Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen', D-Paderborn (Germany), March 9-11, 1998

  187. Rosenstiel
    Rapid Prototyping, Emulation and Hardware-Software Co-Debugging
    NATO Summer School "System Level Synthesis" Il Ciocco, August 9-23 1998

  188. Reutter, Mößner, Rosenstiel
    Design of generic components for efficient reuse in high level designs
    Proceedings SDA'98, Workshop on System Design Automation, March 30& 31,1998, Dresden, pp. 61-67

  189. Kuhn, Rosenstiel
    Java Based Modeling And Simulation Of Digital Systems On Register Transfer Level
    Proceedings SDA'98, Workshop on System Design Automation, March 30& 31,1998, Dresden, pp. 17-22

  190. Gerlach, Rosenstiel
    Transformational Optimization of the Full Rate Speech Transcoder GSM 06.10
    Proceedings SDA'98, Workshop on System Design Automation, March 30& 31,1998, Dresden, pp. 68-73

  191. Rosenstiel
    Eingebettete Systeme im Internet - Technologie für die weltweite Automation
    Handzettel zu INTERTECH BODENSEE '97 vom 6.-8. November 1997 in Friedrichshafen

  192. Rosenstiel, Weiler
    Using Java in Embedded Systems Design
    Proceedings of SASIMI, JAPAN-Osaka, 1997

  193. Weiler, Kunzmann, Rosenstiel
    Performance Analysis for a Java-based Virtual Prototype
    Internation. Workshop on Rapid System Prototyping, USA-Chapel Hill 1997, pp. 12-18

  194. Hergenhan, Weiler, Weiß, Rosenstiel
    Value-Added Services in Industrial Automation
    Proceedings of International Workshop on Advanced Communication Services, P-Lisbon 1998, pp 75-88

  195. Garcez, Rosenstiel
    Constraints as Temporal Logic Formulas and its Verification using Model Checking
    Workshop on Design, Test and Application, Dubrovnik, Croatio, June 8-10, 1998

  196. Nascimento, Rosenstiel
    Co-Synthesis Using a Partial Order Based Model of Concurrency
    Proceedings of the 1st International Workshop on Design, Test and Applications,
    Dubrovnik, Croatia, June 8-10, 1998, S. 109-112

  197. Rosenstiel
    Prototyping and Emulation
    Hardware/Software Co-Design
    Kluwer Academic Publishers, 1997, pp. 75 -112

  198. Trautwein, Rosenstiel
    Elektronik-CAD-Anwendungen im www
    GI-Fachtagung, Tele- CAD - Produktentwicklung in Netzwerken (CAD' 98), Darmstadt, März 1998.

  199. Weiß, Kistner, Kunzmann, Rosenstiel
    Analysis of XC6000 Architecture for Embedded System Design
    IEEE Symposium on Field-Programmable Custom Computing Machines FCCM '98; April 15-April 17, 1998, Mariott at Napa Valley, Napa, CA, USA (Preliminary Proceedings)

  200. Haug, Rosenstiel
    Reconfigurable Hardware as Shared Resource for Parallel Threads
    IEEE Symposium on Field-Programmable Custom Computing Machines FCCM '98; Mariott at Napa Valley, Napa, CA, USA (Preliminary Proceedings), April 15-17, 1998

  201. Garcez, Rosenstiel
    Constraints as Temporal Logic Formulas and its Verification using Model Checking
    Proceedings of the 1st International Workshop on Design, Test and Applications,
    Dubrovnik, Croatia, June 8-10, 1998, S. 97-100

  202. Hansen, Kunzmann, Rosenstiel
    Verification by Simulation Comparison using Interface Synthesis
    DATE '98, Paris, France, February 23-26, 1998

  203. Hansen, Nascimento, Rosenstiel
    Verifying High-Level Synthesis Results Using a Partial Order Based Model
    eingereicht zu HLDVT 98

  204. Tacke, Cechin, Ludwig, Mack, Rosenstiel
    Classification of a -Helix and b -Sheet Structures in Proteins
    Proceedings of the Fourth International Conference on Engineering Applications of Neural Networks, Gibraltar, June 10-12, 1998

  205. Koch, Weinmann, Kebschull, Rosenstiel
    System prototyping in the COBRA Project
    Journal "Microprocesses and Microsystems", Vol. 20 No. 3, Elsevier, 1996

  206. Fernández, Koch, Madrid, Vallejo, Kloos, Rosenstiel
    Hardware-Software Prototyping from LOTOS
    To appear in "Design Automation for Embedded Systems", Kluwer Academic Publishers

  207. Koch, Kebschull, Rosenstiel
    Breakpoints and Breakpoint Detection in Source Level Emulation
    "ACM Transactions on Design Automation of Electronic Systems", Vol. 3 Nr. 2, 1998

  208. Steckelbach, Bubeck, Fößmeier, Kaufmann, Ritt, Rosenstiel
    Visualization of Parallel Execution Graphs
    Symposium on Graph Drawing 98,
    (erscheint Ende 1998 in Lecture Notes in Computer Science)

  209. Trautwein, Rosenstiel
    Auswahl des optimalen Algorithmus für ein Netzwerk aus Workstations
    40. IWK Ilmenau/Germany, Sep. 95

  210. Rosenstiel
    Rapid Prototyping, Emulation and Hardware-Software Co-Debugging
    NATO advanced Study Institute on System Level Synthesis, Il Ciocco/Italy, Aug. 1998

  211. Heuser, Rosenstiel
    Internetsuche und Neuronale Netze: Stand der Technik
    WSI 98-10

  212. Nascimento, Rosenstiel
    Partial order based modeling of concurrency at the system level
    International Workshop on Conjoint Systems Engineering CONSYSE, K. Buchenrieder and A. Seldmeier, Eds., Bad Tölz/Germany, Sept. 1997

  213. Garcez, Rosenstiel
    Coverification of timing properties
    International Workshop on Conjoint Systems Engineering CONSYSE, K. Buchenrieder, and A. Sedlmeier, Eds., Bad Tölz/Germany, Sept. 1997

  214. Nascimento, Rosenstiel
    A co-synthesis approach based on symbolic reachability analysis
    Brazilian Symposium on Integrated Circuit Design 10, Rio de Janeiro/Brazil, Sept-Oct 1998

  215. Gerlach, Rosenstiel
    Development of a High-Level Design Space Exploration Methodology
    WSI 98-13, ISSN 0946-3852, SFB 358, Univ. Tübingen, D-Tübingen, November 1998

  216. Gerlach, Klöpfer, Rosenstiel
    Algorithmischer Ansatz zur automatisierten Entwurfsraum-Exploration auf hoher Abstraktionsebene
    GI/ITG/GMM Workshop Methoden und Beschreibung zur Modellierung und Verifikation von Schaltungen und Systemen, Braunschweig 22.-24.2.99

  217. Kuhn, Rosenstiel, Kebschull
    Beschreibung und Simulation von Hardware/Software-Systemen mit Java
    GI/ITG/GMM Workshop Methoden und Beschreibung zur Modellierung und Verifikation von Schaltungen und Systemen, Braunschweig 22.-24.2.99

  218. Kuhn, Rosenstiel, Kebschull
    Object Oriented Hardware Modeling and Simulation Based on Java
    International Workshop on IP Based Synthesis and System Design
    Grenoble, France 1998

  219. Garcez, Rosenstiel
    Coverification Framework
    SBCCI 98 Búzios, RJ pag 103-107, IEEE Press

  220. Garcez, Nascimento, Rosenstiel
    POM Semantics for 1-safe Petri Nets
    WOLLIC 98, Sao Paulo, Brasilien, 10 pag.

  221. Fernández, Koch, Martínez Madrid, Vallejo, Rosenstiel
    Hardware-Software Prototyping from LOTOS
    Design Automation for Embedded Systems 3, 117-148 (1998), Kluwer Academic Publishers NL, ISSN 0929-5585

  222. Haug, Buchholz, Kebschull, Koch, Rosenstiel
    Behavioral Emulation of Synthesized RT-level Descriptions Using VLIW Architectures
    Proc. Of the 9th RSP, B-Leuven, 1998

  223. Haug, Rosenstiel
    Reconfigurable Hardware as Shared Resource in Multipurpose Computers
    in Field-Programmable Logic Applications, Springer LNCS 1482, D-Heidelberg 1998

  224. Bringmann, Rosenstiel, Reichardt
    Synchronization Detection in Multi-Process Hierarchical Synthesis
    11th International Symposium on System Synthesis (ISSS '98), Hsinchu, Taiwan,
    Dec. 2-4, 1998

  225. Beschorner, Rosenstiel
    Realisierung einer Client/Server-Anwendung mit CORBA und Java unter Berücksichtigung vbestehender C++-Komponenten
    JIT'98 Java-Informations-Tage 1998, Frankfurt/Main, 12./13.Nov. 1998, erschienen in Informatik aktuell, JIT 98, Java-Informationstage 1998, Springer-Verlag 1998

  226. Tacke, Cechin, Ludwig, Mack, Rosenstiel
    Classification of alphy-Helix and beta-Sheet Structures in Proteins,
    Proceedings of EANN'98, Gibraltar, 12-14 June 1998, pp 175-188

  227. Hermle, Weimar, Rosenstiel, Goepel
    Feature Extraction for a Hybrid Gas Sensing System
    WSI- 99, Wilhelm-Schickard-Institut, Universität Tübingen, Germany
    Proceeding of 5th Int. Symposium on Olfaction and Electronic Nose 98, USA-Baltimore, Sept. 27-30, 1998.

  228. Bubeck, Hipp, Hüttemann, Kunze, Ritt, Rosenstiel, Ruder, Speith
    Parallel SPH on Cray T3E and NEC SXC-4 using DTS
    In High Performance Computing in Science and Engineering 1998, pages 396-409
    Springer-Verlag Berlin Heidelberg 1999, ISBN 3-540-65030-X

  229. Lange, Rosenstiel
    High-Level-Synthese einer ATM-Switch-Steuerung mit dem Behavioral CompilerTM von SynopsysTM
    In WSI-99-1, Wilhelm-Schickard-Institut für Informatik, Sand 13, 72076 Tübingen, Germany

  230. Maciel, Rosenstiel
    A Petri Net Based Approach for Estimating Area in Hardware/Software Codesign
    In High Performance Computing Conference, Design Automation for Embedded Systems Journal,Kluwer 1999

  231. Maciel, Rosenstiel
    A Petri Net Model for Hardware/Software Codesign
    In High Performance Computing Conference, Design Automation for Embedded Systems Journal, Kluwer 1999

  232. Kuhn, Rosenstiel, Kebschull
    Description and Simulation of Hardware/Software Systems
    36th Design Automation Conference (DAC), New Orleans, USA, June 20-26, 1999

  233. Rosenstiel
    Entwurfsmethoden für eingebettete Systeme
    it+ti-Informationstechnik und Technische Informatik 41 (1999) 2, R. Oldenburg Verlag, München, Germany

  234. Schmitt, Rosenstiel
    Konzeption und Realisierung eingebetteter Systeme im Internet
    Uni Tübingen, WSI 99-3, ISSN 0946-3852

  235. Barna, Rosenstiel
    Object Oriented Reuse Methodology for VHDL
    D.A.T.E. 99, 0-765-0078-1/99, pp 689-693, München Germany, March 9-12, 1999

  236. Reutter, Rosenstiel
    An Efficient Reuse System for Digital Circuit Design
    D.A.T.E. 99, 0-765-0078-1/99, pp 38-43, München Germany, March 9-12, 1999

  237. Koppenhöfer, Jakob, Würthner, Rosenstiel, Zhu, Lin
    Creating Knowledge on the Separation of Enantiomers of Drugs
    21st International Symposium on Capillary Chromatography and Electrophoresis, Park City, Utah USA, June 20-24, 1999

  238. Bubeck, Hipp, Hüttemann, Kunze, Ritt, Rosenstiel, Ruder, Speith
    SPH test simulations on a portable parallel environment
    Proceed. Workshop Physics and Computer Science, Heidelberg, Germany, March 15-16, 1999

  239. Schmitt, Rosenstiel
    Konzeption und Realisierung eingebetteter Systeme im Internet
    WSI 99-3, Wilhelm-Schickard-Institut, Universität Tübingen, Germany, März 99

  240. Weiß, Steckstor, Rosenstiel
    Emulation of a Fast Reactive Embedded System using a Real Time Operating System
    D.A.T.E. 99, 0-765-0078-1/99, pp 164-165, München Germany, March 9-12, 1999

  241. Gerlach, Klöpfer, Rosenstiel
    Algorithmischer Ansatz zur automatisierten Entwurfsraum-Exploration auf hoher Abstraktionsebene
    Tagungsband Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, Braunschweig Germany, Feb 22-24, 1999, Shaker Verlag

  242. Sapozhnikova, Lunin, Ludwig, Rosenstiel
    Using the Neural Networks on the Basis of Adaptive Resonance Theory to Quality Testing in Semiconductor Industry
    EANN 99, Warschaw Poland, September 13-15

  243. Dreher, Martin, Rosenstiel
    Das Weaver-II-Board als neue HW/SW-Codesign Plattform
    SDA '99, Rathen Germany, April 19-20, 1999

  244. Gerlach, Rosenstiel
    Ein modularer Steuerungsansatz zur Automatisierung der abstrakten Entwurfsraum-Exploration
    SDA '99, Rathen Germany, April 19-20, 1999

  245. Weiß, Steckstor, Koch, Rosenstiel
    Exploiting FPGA-Features during the Emulation of a Fast Reactive Embedded System
    FPGA '99, Monterey Ca USA, February 18-23, 1999

  246. Kuhn, Rosenstiel, Kebschull
    Beschreibung und Simulation von Hardware/Software-Systemen mit Java
    GI/ITG/GMM Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, Braunschweig Germany, Febraury 23-24, 1999

  247. Sapozhnikova, Lunin, Ludwig, Rosenstiel
    Anwendung Neuronaler Netze (ART) zur Qualitätsprüfung von Wafern
    Neuro-Computer und seine Anwendung, Moskau, Russia, 1999

  248. Schmitt, Rosenstiel
    Der Einsatz von Jini fuer die Realisierung durchgängiger Steuerungskonzepte in verteilten eingebetteten Systemen
    JIT'99, Düsseldorf, September 1999

  249. Schmitt, Rosenstiel
    Realisierungsmöglichkeiten eingebetteter Systeme im Internet GMM/GI/ITG Workshop Entwurf integrierter Schaltungen
    Darmstadt, September 1999

  250. Wunner, Rosenstiel
    Multimedia in der Hochschullehre - Ein Überblick über die Grundlagen und aktuelle Konferenz-Werkzeuge
    WSI-99-7, Wilhelm-Schickard_Institut, Universität Tübingen, Germany, July 1999

  251. Rosenstiel
    Rapid Prototyping, Emulation and Hardware-Software Co-Debugging
    System-Level Synthesis, Series E: Applied Sciences - Vol. 357, S. 219-262, 1999

  252. Bringmann, Rosenstiel
    Hierarchische Synthese für die Emulation von integrierten Steuerungssystem
    WSI -99, Wilhelm-Schickard-Institut, Universität Tübingen, Germany, 1999

  253. Bassetti, Davis, Mohr (Eds.)
    Proceedings of the Workshop on Parallel/High-Performance Object-Oriented Scientific Computing (POOSC’99)
    Interner Bericht Forschungszentrum Jülich, Zentralinstitut für Angewandte Mathematik, Germany, Juni 1999

  254. Lange, Rosenstiel
    VHDL Description and High-Level Synthesis of an ATM Layer Circuit
    EUROMICRO’99, 8.bis 10.9.99, Mailand, Italien

  255. Lange, Rosenstiel
    VHDL Design and High-Level Synthesis of an ATM Switch Controller
    FDL’99, 30.8. -3.9.99, Lyon, Frankreich

  256. Kress, Haug, Kebschull, Rosenstiel
    Hardware/Software System Prototyping using VLIW Architectures
    EMMSEC 99, Konferenz in Stockhom, Schweden, 1999

  257. Rosenstiel
    Eingebettete Systeme
    At 7/99, Automatisierungstechnik 47, Theoretische Grundlagen, Methoden, Anwendungen, S. 283-284, Oldenburg Verlag

  258. Hergenhan, Weiler, Rosenstiel
    Internet-basierte eingebettete Systeme in der industriellen Automation
    At 7/99, Automatisierungstechnik 47, Theoretische Grundlagen, Methoden, Anwendungen, S. 305-313, Oldenburg Verlag

  259. Weiß, Steckstor, Rosenstiel
    Performance Analysis of a RTOS by Emulation of an Embedded System
    IEEE International Workshop on Rapid System Prototyping, 16-18 Juni 1999

  260. Heuser, Rosenstiel
    Das Hierarchische Radius-basierte Competitive Learning (HRCL) im Vergleich mit statistischen und neuronalen Clusteranalyseverfahren
    WSI-99-08, Wilhelm-Schickard-Institut, Universität Tübingen, Germany

  261. Hermle, Weimar, Rosenstiel, Göpel
    Performance of selected Evaluation Methods for a Hybrid Sensor System
    WSI-99, Wilhelm-Schickard-Institut, Universtät Tübingen, Germany

  262. Fietzek, Hermle, Reich, Pfeiffer, Roeder, Czesla, Weimar, Rosenstiel, Schurig, Göpel
    Recognition of chiral flavoring agents using b -cyclodextring-coated quartz- crystal-Microbalances (QCMs)
    WSI-99, Wilhelm-Schickard-Institut, Universität Tübingen, Germany
    QCM’s, Proceedings, 6th Int. Symposium on Olfaction & Electronic Nose 99, Tübingen, September 20-22, 1999

  263. Hipp, Hüttemann, Konold, Klingler, Leinen, Ritt, Ruder, Speith, Yserentant
    A Paralell Objekt Oriented Framework for Particle Methods
    In Krause and Jäger (edt.), High Performance Computing in Science and Engineering ’99, Springer-Verlag, 1999

  264. Hüttemann, Hipp, Ritt, Rosenstiel
    Object Oriented Concepts for Paralell Smoothed Paticle Hydrodynamics Simulations
    In Bassetti, Davis, Mohr (edt.), Proceedings of the Workshop on Parallel/High-Performance Object-Oriented Scientific Computing (POOSC’99), European Conference on Object-Oriented Programming (PCOOP’99), Technical Report

  265. Basetti, Davis, Mohr (edt.)
    Proceedings of the Workshop on Parallel/High-Performance Object-Oriented Scientific Computing (POOSC’99)
    Forschungszentrum Jülich GmbH, Zentralinstitut für Angewandte Mathemathik, 52425 Jülich FZJ-ZAM-IB-9906, juni 1999

  266. Martin, Rosenstiel
    FPGA-Design unter besonderer Berücksichtigung von Multiplexer-Struktur und Verdrahtbarkeit
    WSI 1999, ISSN 0946-3852

  267. Bessonov, Heuser, Nekretyanov, Patel
    Open Architecture for Distributed Search Systems
    Proc. of the Sixth International Conference on Intelligence in Services and Networks
    In: H. Zuidweg, M. Campolargo, J. Delgado, A. Mullery (Eds.), Intelligence in Services and Networks, Lecture Notes in Computer Science 1597, Springer Verlag, 1999

  268. Bringmann, Färber, Hofmann, Muth, Rosenstiel, Slomka
    Mixed Abstraction Level Hardware Synthesis from SDL for Rapid Prototyping
    1999 IEEE, RSP 99, Clearwater 1999

  269. Bringmann, Rosenstiel
    Hierarchische Synthese für die Emulation von integrierten Steuerungssystemen
    Informatik `99 – 29. Jahrestagung der Gesellschaft für Informatik, Informatik aktuell, Springer Verlag, 1999

  270. Bringmann, Rosenstiel, Muth, Färber, Slomka, Hofmann
    Mixed Abstraction Level Hardware Synthesis from SDL for Rapid Prototyping
    Proceedings of the 10th Workshop on Rapid System Prototyping, 1999

  271. Hilgendorf, Heim, Rosenstiel
    Evaluation of branch-prediction methods on traces from commercial applications
    IBM Journal of Research and Development, Vol. 43, Nr. 4, July 1999

  272. Gerlach, Rosenstiel
    Transformationale Optimierung von Entwurfsdarstellungen der algorithmischen Ebene
    WSI 99-19, ISSN 0946-3852

  273. Gerlach, Rosenstiel
    Ein modularer Ansatz zur Transformationssteuerung
    WSI 99-20, ISSN 0946-3852

  274. Bogdan, Rosenstiel
    Application of Artificial Neural Networks for Different Engineering Problems
    Lecture Notes in Computer Science 1725, SOFSEM 99, Milouy, CZ, pp 277-294 Springer Verlag Berlin Heidelberg 1999

  275. Hüttemann, Launay, Marinescu, Miller, Vandewart, Müller, Prodan
    Parallel/High-Performance Object-Oriented Scientific Computing
    Lecture Notes in Computer Science No. 1743, Moreira, Demeyer (Hg.) Object-Oriented Technology ECOOP’99,13th European Conference on Object-Oriented Programming, Workshop Reader, Lisbon, Portugal, June 1999, 222-239

  276. Ruf, Kropf
    Modeling and Checking Networks of Communicating Real-Time Processes
    Conference on Correct Hardware Design and Verification Methods, CHARME 99

  277. Ruf, Kropf
    Modeling Real-Time Systems with I/O-Interval Structures
    Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, GI/ITG/GMM Workshop, 1999

  278. Sapozhnikova, Lunin, Ludwig, Rosenstiel
    The use of dARTMAP and Fuzzy ARTMAP to solve the quality testing task in semiconductor industry
    Proc. of KES 99

  279. Seepold, Martínez Madrid
    Hardware/Software Co-Design for IP Objects based on CORBA
    VIUF Fall 1999

  280. Seepold, Martínez Madrid
    IP Reuse for System-on-a-Chip Design
    Forum on Design Language, FDL 99

  281. Seepold, Kunzmann
    Reuse Techniques for VLSI Design
    Kluwer Academic Publishers, 1999

  282. Seepold
    Reuse of IP and Virtual Components
    Proc. of Design, Automation and Test in Europe, DATE 99

  283. Sapozhnikova, Lunin, Ludwig, Rosenstiel
    Using the neural networks dARTMAP and Fuzzy ARTMAP for quality testing task in semiconductor industry
    In: Proceedings of ANNIE-99 St. Luis, USA, 1999, pp.1169-1176 ISBN 0-7918-0098-9

  284. Sapozhnikova, Lunin, Ludwig, Rosenstiel
    The use of dARTMAP and Fuzzy ARTMAP to solve the quality testing task in semiconductor industry
    In: Proc. of KES-99 Adelaide Australia 1999, pp. 361-364 ISBN 0-7803-5578-4

  285. Haug, Kebschull, Rosenstiel
    Emulation synthetisierter Verhaltensbeschreibungen mit VLIW-Prozessoren
    GI/ITG Workshop Frankfurt, Februar 2000

  286. Buchholz, Rosenstiel
    Constraint-based Specification of Complex Components
    Hardware Description Languages Conference (HDLCON) 2000, San Jose, 8-10 March 2000

  287. Kuhn, Schulz-Key, Rosenstiel
    Object Oriented Hardware Specification with Java
    SASIMI 2000

  288. Rosenstiel, Babanine, Bessonov, Heuser
    OASIS: INTERNET/INTRANET - Suchmaschine optimiert durch Neuronale Netze
    CeBit 2000

  289. Rosenstiel, Ludwig
    Neuronale Netze in der industriellen Qualitätssicherung
    CeBit 2000

  290. Rosenstiel, Bogdan
    Neuronale Netze: Nervengesteuerte künstliche Hand
    CeBit 2000

  291. Sapozhnikova, Ludwig, Rosenstiel
    Die Anwendung des Distributed ARTMAP Netzes zur Analyse von elektrischen Parametern in der Chip-Fertigung
    Im VDI-Bericht 1526, 2000

  292. Sapozhnikova, Hermle, Lunin, Ludwig, Rosenstiel
    ART neural networks for analysis of monitoring data
    In Proc. of AI-2000, Innsbruck, Austria, 2000

  293. Gerlach, Rosenstiel
    System Level Design Using the SystemC Modeling Platform
    SASIMI 2000

  294. Bringmann, Rosenstiel
    Hierarchische Synthese für anwendungsspezifische Prototypenimplementierungen
    it + it - Informationstechnik und Technische Informtik 42 (2000) 2, Oldenbourg Verlag, 34-39

  295. Ludwig, Sapozhnikova, Lunin, Rosenstiel
    Error Classification and Yield Prediction of Chips in Semiconductor Industry Applications
    Neural Computing & Applications, Springer Verlag, 2000

  296. Ruf, Hoffmann, Kropf, Rosenstiel
    Checking Temporal Properties Under Simulation of Executable System Descriptions
    Proceedings of Workshop on High Level Desing Validation and Test, HLDVT 2000

  297. Ruf, Hoffmann, Kropf, Rosenstiel
    Simulation Based Validation of FLTL Formulas in Executable System Descriptions
    Forum on Design Languages, FDL 2000

  298. Hoffmann, Ruf, Kropf, Rosenstiel
    Simulation Meets Verification – Checking Temporal Properties in SystemC1
    Proceedings of the Symposium on Digital Systems Design, DSD 2000

  299. Wunner
    Visuell präsent
    iX 12/2000, Heise Verlag

  300. Sapozhnikova, Lunin, Ludwig, Rosenstiel
    Neuronale Algorithmen in Qualitätssicherung von Chips
    Zeitschrift "Neurocomputer: Entwicklung und Anwendung" N 3, 2000

  301. Beschorner, Rosenstiel
    Effiziente Datenübertragung in EJB-Systemen
    Proceedings of Net. ObjectDays 2000

  302. Borel, Sauer, Seepold
    Evaluation of Technology and the MEDEA Design Automation Roadmap
    Virtual Components Design and Reuse, Kluwer Academic Publishers, 2000

  303. Bringmann, Menn, Rosenstiel
    Target Architecture Oriented High-Level Synthesis for Multi-FPGA Based Emulation
    Proceedings of Design, Automation and Test in Europe, DATE 2000

  304. Flake, Müller, Ruf
    Structured English vor Model Checking Specification
    Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, GI/ITG/GMM Workshop, 2000

  305. Flake, Müller, Pape, Ruf
    Modellprüfung für den Entwurf von Fertigungssteuerungssystemen
    GI-Fachtagung "Modellierung betrieblicher Informationssysteme" MobIS 2000

  306. Grundmann, Ritt, Rosenstiel
    Object-Oriented Message-Passing with TPO++
    In: Arndt Bode, Thomas Ludwig, Wolfgang Karl and Roland Wissmüller (eds.), EuroPar 2000 Parallel processing, Springer Verlag 2000

  307. Grundmann, Ritt, Rosenstiel
    TPO++: An Object-Oriented Message-Passing Library in C++
    In: David J. Lilja (editor), Proc. of the 2000 International Conference on Parallel Processing, IEEE Computer Society, 2000

  308. Hansen, Bringmann, Rosenstiel
    A VHDL Component Model for Mixed Abstraction Level Simulation and Behavioral Synthesis
    Forum on Design Languages, FDL 99

  309. Hansen, Nascimento, Rosenstiel
    An Approach for Extracting RT Timing Information to Annotate Algorithmic VHDL Specifications
    Proceedings of the 36th Design Automation Conference, DAC 99

  310. Hansen, Uhlmann, Rosenstiel
    An Interface Description Model for Reuse of Algorithmic Hardware Specifications
    GI-Workshop Hardwarebeschreibungssprachen und Modellierungsparadigmen, 1999

  311. Hansen, Pröfrock, Rosenstiel
    Transformation of Algorithmic Simulation Vector Sets for Automatic Reuse at RT Level
    Forum on Design Languages, FDL 2000

  312. Hansen, Rosenstiel
    Transformation of Algorithmic Simulation Vector Sets Considering Mapping Problems of I/O Operations
    International High Level Design Validation and Test Workshop, HDLVT 2000

  313. Haug, Kebschull, Rosenstiel
    VLIW Based Emulation of Digital Designs with the RAVE System
    International High Level Design Validation and Test Workshop, HLDVT 1999

  314. Haug, Kebschull, Rosenstiel
    A Hardware Platform for VLIW Based Emulation of Digital Designs
    Proceedings of Design, Automation and Test in Europe, DATE 2000

  315. Heuser, Babanine, Petoukhov, Rosenstiel
    Neural Networks Subsystem
    In: A. Patel, L. Petrosjan, W. Rosenstiel (Eds.): OASIS: Distributed Search System in the Internet, St. Petersburg State University Published Press 1999

  316. Hilgendorf, Heim, Rosenstiel
    Evaluation of Branch-Prediction Methods on Traces From Commercial Applications
    IBM Journal of Research and Development, Vol. 43, Nr. 4 July 1999

  317. Heuser, Babanine, Bessonov
    OASIS: Intelligente Suchmaschinen
    Programm Junge Innovatoren, Ministerium für Wissenschaft, Forschung und Kunst Baden-Württemberg, 2000,
    Avantgarde im Gründerland, Haus der Wirtschaft, 2000, und Junited – Gründermesse im Bildungs- und Technologiezentrum der IHK Reutlingen, 2000

  318. Heuser, Rosenstiel
    Automatic Construction of Local Internet Directories using Hierarchical Radius-based Competitive Learning
    Proc. of the 4th World Multiconference on Systemics, Cybernetics and Informatics, Volume IV (Communications Systems and Networks) SCI 2000

  319. Heuser, Rosenstiel
    Automatic Generation of Local Internet
    Catalogues using Hierarchical Radius-based Competitive Learning
    In: W. Horn (ed.): ECAI 2000, Proc. of the 14th European Conference on Artificial Intelligence, IOS Press, Amsterdam, 2000

  320. Hoffmann, Kropf
    Efficient design error correction of digital circuits
    Proceedings of the 18th IEEE International Conference on Computer Design, ICCD 2000

  321. Hoffmann, Kropf
    Can automatic error correction be applied to large circuits
    Proceedings of the Symposium on Digital Systems Design, DSD 2000

  322. Hoffmann, Kropf
    Exploiting Hierarchy for Multiple Error Correction of Combinational Circuits
    Proceedings of Design, Automation and Test in Europe, DATE 2000

  323. Hoffmann, Kropf
    Automatic error correction of tri-state circuits
    Proceedings of the 17th IEEE International Conference on Computer Design, ICCD 99

  324. Hoffmann, Kropf
    Automatic Error Correction of Large Circuits Using Boolean Decomposition and Abstraction
    Proceedings of the Conference on Correct Hardware Design and Verification Methods, CHARME 99

  325. Lange
    Effiziente Generierung von Zustandsautomaten mit integriertem Datenpfad aus taktgebundenen VHDL-Verhaltensbeschreibungen
    WSI-00-18, Wilhelm-Schickard-Institut, Universität Tübingen, 2000

  326. Lange, Rosenstiel
    Synthesis of ATM Switch Controller Modules with the Protocol CompilerTM from SynopsysTM
    WSI-00-6, Wilhelm-Schickard-Institut, Universität Tübingen, 2000

  327. Lange, Rosenstiel
    Modeling and Synthesis of Data Transmission Control Logic Using the Protocol CompilerTM
    Forum on Design Languages, FDL 2000

  328. Reif, Ruf, Schellhorn, Vollmer
    Do You Trust Your Model Checker?
    Proceedings of Formal Methods in Computer Aided Design, FMCAD 2000

  329. Ruf
    A Toolset for the Symbolic Examination of Finite State Transition Systems
    Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, GI/ITG/GMM Workshop, 2000

  330. Ruf, Kropf
    Analyzing Real-Time Systems
    Proceedings of Design, Automation and Test in Europe, DATE 2000

  331. Wunner
    Konferenzsysteme – Internet – vs. ISDN-Videokonferenzen
    iX – Magazin für professionelle Informationstechnik 12/00

  332. Wunner
    Neue Klänge – Advanced Linux Sound Architecture (ALSA)
    iX – Magazin für professionelle Informationstechnik 10/99

  333. Sapozhnikova, Ludwig, Lunin, Rosenstiel
    Neural Prediction of Chip Quality on the Basis of Monitoring Data
    Proc. of VII Conference "Neurocomputers and their application", 2000

  334. Schmitt, Rosenstiel
    Untersuchungen zur Implementierung von Java-Laufzeitumgebungen für eingebettete Systeme
    NODE 2000

  335. Schneider, Hoffmann
    A HOL conversion for translating linear time temporal logic to omega-automata
    Proc. of the Conference of Theorem Proving in Higher-order Logic, TPHOL 99

  336. Seepold, Martínez Madrid
    Virtual Components Design and Reuse
    Kluwer Academic Publishers, Nov. 2000

  337. Seepold, Martínez Madrid, Rosenstiel
    Reuse of Virtual Components in System-on-Chip Environments
    Proc. of Design, Automation and Test in Europe, DATE 2000

  338. Seepold
    IP Reuse
    Kapitel 7 in Joseph Borel, The MEDEA DESIGN AUTOMATION ROADMAP, Micro-Electronics Development for European Applications (MEDEA), 2. Ausgabe, 2000

  339. Schulz-Key, Kuhn, Rosenstiel
    A Framework for System-Level Partitioning of Object-Oriented Specifications
    Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI'2001), 2001

  340. Seepold
    Specification and Standardization of System-Level IP
    IP Forum, 2001

  341. Seepold
    Standardization of System-Level IP
    GI/ITG/GMM-Workshop, 2001,

  342. Seepold
    Reuse of Virtual Components
    Diseño De Sistemas Embebidos HW/SW - Universidad de Cantabria (Summer School), 2001,

  343. Seepold, Martinez, (Hrsg.)
    Virtual Components Design and Reuse
    Kluwer Academic Publishers, ISBN0-7923-7261-1, 2001

  344. Vörg, Martinez, Seepold, Rosenstiel
    IP-Qualifizierung wiederverwendbarer Schaltungsbeschreibungen
    Entwurf Integrierter Schaltungen, 10. E.I.S.-Workshop 2001

  345. Vörg, Seepold, Martinez, Rosenstiel
    IP-Qualification, Reuse, IP-Packaging
    Forum on Design Languages 2001

  346. Ashenden, Mermet, Seepold (Hrsg.)
    System-on-Chip Methodologies & Design Languages
    Kluwer Academic Publishers, ISBN 0-7923-7393-6, 2001

  347. Bogdan, Franke, Rosenstiel
    Real Time Processing of Nerve Signals for Controlling an Artificial Hand
    IASTED International Conference on Applied Informatics AI 2001, 2001

  348. Bogdan, Rosenstiel
    Detection of Cluster in Self-Organizing Maps for Controlling a Prostheses using Nerve Signals
    ESANN 2001, 2001

  349. Fietzek, Hermle, Rosenstiel, Schurig
    Chiral discrimination of limonene by use of ß-cyclodextrin-coated quartz-crystal-micro-balances (QCMs) and data evaluation by artificial neuronal networks
    Fresenius J Anal Chem 371, 2001

  350. Flake, Geiger, Mueller, Paelke, Rosenbach, Ruf
    Customer-Oriented Systems Design through Virtual Prototypes
    10th Int. Workshop on Enabling Technologies: Infrastructure for Collaborative Enterprises (WET ICE'01),. ©IEEE, 2001

  351. Flake, Müller, Pape, Ruf
    Analyzing Timing Constraints in Flexible Manufacturing Systems
    Proceedings of Intelligent Manufacturing Systems. 2001

  352. Ganzenmüller, Hipp, Kunze, Pinkenburg, Ritt, Rosenstiel, Ruder, Schäfer
    Efficient and Object-Oriented Libraries for Particle Simulations,
    Krause, Jäger und Resch,

  353. Gerlach, Rosenstiel
    System Level Design. Using the SystemC Modeling Platform
    Merker, Schwarz (Eds.): System Design Automation Kluwer Academic Publishers ISBN 0-7923-7313-8, 2001

  354. Hansen, Bringmann, Rosenstiel
    A VHDL Reuse Component Model for Mixed Abstraction Level Simulation and Behavioral Synthesis
    System-on-Chip Methodologies & Design Languages; edited by P.J. Ashenden, J.P. Mermet and R. Seepold (Buch); Kluwer Academic Publishers, 2001

  355. Haug, Rosenstiel
    VLIW-Prozessorbasierte Emulation und Prototyping digitaler Schaltungen
    Entwurf Integrierter Schaltungen, 10. E.I.S.-Workshop, 2001

  356. Hermle, Bogdan, Schwarz
    Spike sorting algorithm based on independent components analysis (INCA) and a self-organizing map (SOM) minimizing user interaction - application to multineuron recordings in CNS
    Proceedings, World Congress on Neuroinformatics, 2001

  357. Hipp, Kunze, Ritt, Rosenstiel, Ruder
    Fast parallel particle simulations on distributed memory architectures
    E. Krause and W. Jäger (editors), High Performance Computing in Science and Engineering, 2001

  358. Kuhn, Oppold, Schulz-Key, Winterholer, Rosenstiel, Edwards, Kashai
    Object Oriented Hardware Synthesis and Verification
    14th International Symposium on System Synthesis (ISSS'01), 2001

  359. Kuhn, Oppold, Winterholer, Rosenstiel, Edwards, Kashai
    A Framework for Object Oriented Hardware Specification, Verification, and Synthesis
    DATE, 2001

  360. Lange, Rosenstiel
    Synthesis of Data Transmission Circuits Starting from Behavioral HW Descriptions
    Proceedings of the ICECS 2001, the 8th International Conference on Electronics, Circuits and Systems, 2001

  361. Martinez, Peralias, Acosta, Rueda,
    Analog/Mixed-Signal IP Modeling for Design Reuse
    DATE 2001

  362. Müller, Ruf, Hoffmann, Gerlach, Kropf, Rosenstiel
    The Simulation Semantics of SystemC
    DATE 2001

  363. Pinkenburg, Ritt, Rosenstiel
    Parallelization of an object-oriented particle-in-cell simulation
    Workshop Parallel Object-Oriented Scientific Computing, OOPSLA, 2001

  364. Radetzki, Neumann, Haase, Seepold, Madrid, Vörg,
    Automated Qualification Flow for Soft IP
    Proceedings of the MEDEA+ Conference on Application-Oriented SoC Design, 2001

  365. Reif, Ruf, Schellhorn, Vollmer
    Correctness of Efficient Real-Time Model Checking
    Journal on Universal Computer Science (J.UCS), Special Issue on Tools for System Design and Verification, Springer Verlag Heidelberg, 2001

  366. Ruf
    RAVEN: Real-Time Analyzing and Verification Environment
    Journal on Universal Computer Science (J.UCS), Special Issue on Tools for System Design and Verification, Springer Verlag Heidelberg, 2001

  367. Ruf, Hoffmann, Gerlach, Kropf, Rosenstiel
    The Simulation Semantics of SystemC
    DATE 2001

  368. Ruf, Hoffmann, Kropf, Rosenstiel
    Simulation-Guided Property Checking Based on Multi-Valued AR-Automata
    Proceedings of Design Automation and Test in Europe (DATE), München, IEEE Conmputer Society Press,2001

  369. Ruf, Kropf
    Formale Verifikation diskreter Echtzeitsysteme
    In: it+ti Informationstechnik und technische Informatik, Oldenbourg Verlag 2001

  370. Sapozhnikova, Ludwig, Rosenstiel
    A Modification of the Fuzzy ARTMAP Algorithm
    Proceedings of the 5th World Multi-Conference on Systemics, Cybernetics and Informatics, SCI 2001,

  371. Sapozhnikova, Lunin, Rosenstiel
    Modified search in Fuzzy ARTMAP Proceedings of the Conference "Neuroinformatics-2001"

  372. Schmitt, Rosenstiel
    Java in eingebetteten Systemen
    it + ti - Informationstechnik und Technische Informatik 43, Oldenbourg Verlag, 2001

  373. Schmitt, Rosenstiel
    Konzeption einer adaptiven und dynamisch konfigurierbaren Laufzeitumgebung für echtzeitkritische eingebettete Systeme
    Arbeitsplatzcomputer 2001 (APC 2001), Technische Universität, VDE Verlag/Arndt Bode, Wolfgang Karl, 2001

  374. Schmitt, Rosenstiel
    Tutorial Real Time Java for Embedded Systems
    Design, Automation and Test in Europe (DATE 2001), IEEE, 2001

  375. Schmitt, Rosenstiel.
    Java in eingebetteten Systemen
    it + ti - Informationstechnik und Technische Informatik 43 (2001) 3, Oldenbourg Verlag, 2001

  376. Atmel, Forschungszentrum Informatik (FZI) SIM, Infineon Technologies and sci-worx,
    Tutorial on Intellectual Property (IP)
    DAC, 2002.

  377. Braun, Gerlach, Rosenstiel
    Checking Temporal Properties in SystemC Specifications
    HLDVT 2002

  378. Braun, Hansen, Gerlach, Rosenstiel
    Test Bench Support for SystemC Specifications
    FDL 2002

  379. Ginés, Peralías, Adoración Rueda, Seepold, Martinez
    A Mixed-Signal Design Reuse Methodology Based on Parametric Behavioural Models with Non-Ideal Effects
    DATE 2002

  380. Hoehn, Lindner, Mayer, Hermle, Rosenstiel
    Neural Networks Evaluating NMR Data: An Approach to Visualize Similarities and Relationships of Sol-Gel Derived Inorganic-Organic and Organometallic Hybrid Polymers
    Journal of Chemical Information and Computer Sciences 2002

  381. Holtwick, Ruder
    Simulation von Diesel-Einspritzung mit Smoothed Particle Hydrodynamics
    Spray 2002 -- 7. Workshop über Techniken der Fluidzerstäubung und Untersuchungen von Sprühvorgängen, Obermeier, F. (Hrsg.), 2002.

  382. Martinez, Acosta, Ruiz, Seepold
    Multi-level analog/mixed-signal IP specification
    FDL 2002

  383. Menn, Bringmann, Rosenstiel
    Controller Estimation for FPGA Target Architectures During High-Level Synthesis
    15th International Symposium on System Synthesis, ISSS 2002, IEEE Computer Society Press 2002

  384. Oppold, Rosenstiel
    IP Design for Dynamically Reconfigurable SoCs
    International Workshop on IP-Based SoC Design 2002

  385. Rosenstiel
    Platform Based Design of Embedded Systems in SystemC
    Medea+ Design Automation Conference, 2002

  386. Ruf
    Data Analysis of Timed Finite State Systems
    Proceedings of GI/ITG/GMM-Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, MoPress, 2002

  387. Ruf (Hrsg.)
    Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen
    5. GI/ITG/GMM-Workshop Beschreibungssprachen und Verifikation http://www.logos-verlag.de/cgi-local/buch?isbn=325 Shaker Verlag, 2002

  388. Ruf, Kropf
    Formal Data Analysis of Timed Finite State Systems
    In: 14th Euromicro Conference on Real-Time Systems IEEE Computer Society Press 2002

  389. Ruf, Kropf
    A Visual Approach to Validating System Level Designs
    In 15th International Symposium on System Synthesis, ISSS 2002, IEEE Computer Society Press 2002

  390. Ruf, Kropf
    Combination of Simulation and Formal Verification
    Proceedings of GI/ITG/GMM-Workshop, Shaker Verlag Aachen 2002

  391. Schröder, Bogdan, Rosenstiel, Hinterberger, Strehl, Birbaumer
    Online Classification of EEG Signals Using Artificial Neural Networks For Biofeedback Training of Patients with Epilepsy
    Proceedings of the 9th International Workshop on Systems, Signals and Image Processing. Series: Recent Trends in Multimedia Information Processing, World Scientific 2002

  392. Seepold, Martinez, Vörg, Rosenstiel, Radetzki, Neumann, Haase
    A Qualification Platform for Design Reuse
    International Symposium for Quality Electronic Design 2002

  393. Siebenborn, Bringmann, Rosenstiel,
    Worst-case performance analysis of parallel, communicating software processes
    CODES, Proceedings of the Tenth International Symposium on Hardware/Softwarw Codesign 2002

  394. Bogdan, Schröder, Rosenstiel
    Artificial Neural Net Based Signal Processing for Interaction with Peripheral Nervous System
    In: Proceedings of the 1st International IEEE EMBS Conference on Neural Engineering, 2003

  395. Bogdan, Schröder, Rosenstiel
    Towards the Restoration of Hand Grasp Function of Quadriplegic Patients based on Artificial Neural Net Controller using Peripheral Nerve Stimulation
    ESANN 2003

  396. Braun, Schubert, Stark, Haug, Gerlach, Rosenstiel
    Case Study: SystemC-Based Design of an Industrial Exposure Control Unit
    FDL 2003

  397. Braun, Freuer, Gerlach, Rosenstiel
    Automated Conversion of SystemC Fixed-Point Data Types for Hardware Synthesis
    IFIP VLSI-SoC 2003

  398. Holtwick, Ruder
    Simulation of Diesel-Injection with Smoothed Particle Hydrodynamics Proceedings of the Russian-German Advanced Research Workshop on Computational Science and High Performance Computing, ISSN 1560-7534, 2003

  399. Krebs, Ruf
    Optimized Temporal Logic Compilation
    Journal on Universal Computer Science, Special Issue on Tools for System Design and Verification Springer Verlag, 2003

  400. Müller, Rosenstiel, Ruf (Hrsg.)
    SystemC - Methodologies and Applications
    Kluwer Academic Publishers, 2003

  401. Rosenstiel
    Moderne Prozessoren
    Symposium Tendenzen der Informationstechnik, IBM Herrenberg. 2003

  402. Rosenstiel
    Transaction Level Modeling in SystemC
    Summer School Multiprocessor System on Chip, 2003

  403. Rosenstiel
    Modelling, Verification, and Synthesis with SystemC - Principles and Examples
    Medea+ Design Automation Conference, 2003

  404. Rosenstiel
    Modeling, Synthesis and Verification in SystemC
    Int. Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS), 2003

  405. Ruf, Kropf, Peranandam
    Bounded Property Checking with Symbolic Simulation
    Proceedings of GI/ITG/GMM-Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, 2003

  406. Ruf, Peranandam, Kropf, Rosenstiel
    Using Symbolic Simulation for Bounded Property Checking
    Proceedings of Forum on Design Languages (FDL) 2003

  407. Sapozhnikova, Rosenstiel
    AFC: ART-Based Fuzzy Classifier Knowledge-Based Intelligent Information and Engineering Systems
    7th International Conference, KES 2003, Proceedings, Part II, 2003

  408. Schnerr, Haug, Rosenstiel
    Instruction Set Emulation for Rapid Prototyping of SoCs"
    DATE 2003

  409. Schröder, Bogdan, Rosenstiel, Hinterberger, Birbaumer
    Automated EEG Feature Selection for Brain Computer Interfaces
    Proceedings of the 1st International IEEE EMBS Conference on Neural Engineering, 2003

  410. Stark, Braun, Rosenstiel
    A Flexible Methodology for the XML-based Automated Interface Generation in Co-Simulation Environments
    DASS SDA, 2003

  411. Braun, Schubert, Stark, Haug, Gerlach, Rosenstiel
    A Case Study: SystemC-Based Design of an Industrial Exposure Control Unit
    C. Grimm (ed.), "Languages for System Specification", Chapter 8 (pp. 119-132), Kluwer Academic Publishers, 2004

  412. Bringmann, Siebenborn, Rosenstiel
    Conflict Analysis in Multiprocess Synthesis for Optimized System Integration International Conference on Hardware - Software Codesign and System Synthesis, CODES+ISSS, 2005
    Donlin, Braun, Rosenstiel SystemC for the Design and Modeling of Programmable Systems Proceedings of Field-Programmable Logic and its applications (FPL), 2004

  413. Flake, Müller, Pape, Ruf
    Specification and formal verification of temporal properties of production automation systems
    LNCS, Springer Verlag Heidelberg, 2004

  414. Herkersdorf, Rosenstiel
    Towards a Framework and a Design Methodology for
    Autonomic Integrated Systems GI-Edition Lecture Notes in Informatics, Informatik 2004 - Informatik verbindet, Band 2, Beiträge der 34. Jahrestagung der Gesellschaft für Informatik e.V., 2004

  415. Hipp, Rosenstiel
    Parallel Hybrid Particle Simulations Using MPI and OpenMP
    Proceedings of Euro-Par, Parallel Processing, 10th International Euro-Par Conference Euro-Par, 2004

  416. Lettnin, Braun, Bogdan, Gerlach, Rosenstiel
    Synthesis of Embedded SystemC Design: A Case Study of Digital Neural Networks
    Proceedings of Design, Automation and Test in Europe (DATE), 2004

  417. Oetjens, Gerlach, Rosenstiel
    Ein XML-basierter Ansatz zur flexiblen Darstellung und Transformation von Schaltungsbeschreibungen, Modellierung und Beschreibungssprachen
    Proceedings of GI/ITG/GMM Workshop, 2004

  418. Oppold, Schweizer, Kuhn, Rosenstiel
    A New Design Approach for Processor-Like Reconfigurable Hardware
    Proceedings of Euro DesignCon, Munich, Germany, 2004

  419. Oppold, Schweizer, Kuhn, Rosenstiel
    Cost Functions for the Design of Dynamically Reconfigurable Processor Architectures
    Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI), Kanazawa, Japan, 2004

  420. Oppold, Schweizer, Kuhn, Rosenstiel
    A Design Environment for Processor-Like Reconfigurable Hardware
    IEEE International Conference on Parallel Computing in Electrical Engineering (PARELEC), Dresden, Germany, 2004

  421. Peranandam, Weiss, Ruf, Kropf, Rosenstiel
    Dynamic Guiding of Bounded Property Checking
    Proceedings of IEEE International High Level Design Validation and Test Workshop (HLDVT), 2004

  422. Peranandam, Weiss, Ruf, and Kropf.
    Transactional level verification and coverage metrics by means of symbolic simulation
    Proceedings of GI/ITG/GMM Workshop, 2004

  423. Pinkenburg, Rosenstiel
    Parallel I/O in an object-oriented message-passing library
    In Recent Advances in Parallel Virtual Machine and Message Passing Interface, PVM/MPI, Springer-Verlag, 2004

  424. Rosenstiel
    IP and design reuse
    The VLSI journal 37, 2004

  425. Ruf, Weiss, Kropf, Rosenstiel
    Modeling and Formal Verification of Production Automation Systems
    Proceedings of Forum on Design Languages (FDL), 2004

  426. Sciuto, Martin, Swan, Flake, Ghenassia, Srouji, Rosenstiel
    SystemC and SystemVerilog: Where do they fit? Where are they going?
    Proceedings of Design, Automation and Test in Europe (DATE), 2004

  427. Schäfer, Speith, Hipp, Kley
    Simulations of planet-disc interactions using Smoothed Particle Hydrodynamics
    Astronomy&Astrophysics 2004

  428. Schmitt, Rosenstiel
    Rapid Prototyping of a Microcontroller IP Core under Resource Limitations
    In: Lindwer, Gerousis, Figueras (Eds.): Design, Automation and Test in Europe, Designers Forum, Paris, 2004

  429. Schmitt, Rosenstiel
    Verification of a Microcontroller IP Core for System-on-Chip Designs Using Low-Cost Prototyping Environments
    In: Stoffel, Kunz (Eds.): Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, Kaiserslautern, 2004

  430. Schmitt, Rosenstiel
    Fast and efficient development of hardware-dependent software for SoC designs
    In: Sullivan (Ed.): Euro DesignCon 2004, München, 2004

  431. Schulz-Key, Winterholer, Schweizer, Kuhn, Rosenstiel
    Object-Oriented Modeling and Synthesis of SystemC Specifications
    Asia South Pacific Design Automation Conference (ASPDAC), Yokohama, Japan, 2004

  432. Siebenborn, Bringmann, Rosenstiel
    Communication Analysis for System on Chip Design
    Proceedings of Design, Automation and Test in Europe (DATE), 2004

  433. Vörg, Radetzki, Rosenstiel
    Measurement of IP Qualification Costs and Benefits
    Proceedings of Design, Automation and Test in Europe (DATE), 2004

  434. Vörg, Rosenstiel
    Automation of IP qualification and IP exchange
    The VLSI journal 37 2004

  435. Winterholer, Schulz-Key, Schweizer, Kuhn, Rosenstiel
    Object-Oriented Hardware Synthesis with SystemC
    Proceedings of Forum on Design Languages (FDL), 2004

  436. Avila, Dölling, Rosenstiel
    Towards seamless top-down design of A/MS systems: An example of system to block-level design in automotive applications
    Proceedings of Forum on Design Languages (FDL), 2005

  437. Avila, Dölling, Rosenstiel
    Eine teilautomatisierbare Methodik für den Übergang von der System- auf die Schaltungsebene am Beispiel eines Reglerentwurfs aus dem Automobilbereich
    Proceedings of Analog, 2005

  438. Bensch, Bogdan, Czerner, Linke, Montino, Schröder, Rosenstiel
    Neural network algorithms for generalised online tool control in medium size semiconductor fabs
    Proceedings of AEC/APC Conference, Benefits of AEC/APC for FAB Efficiency and Product Yield, 2005

  439. Bensch, Schröder, Bogdan, Rosenstiel
    Feature Selection for High-Dimensional Industrial Data
    Proceedings of ESANN, 2005

  440. Bensch, Schröder, Bogdan, Rosenstiel, Hinterberger, Mellinger, Birbaumer
    The Web Browser "Nessi": A BCI Application
    3rd Int. BCI meeting, Albany, 2005

  441. Braun, Grosser, Gerlach, Rosenstiel
    Entwicklung einer SystemC-basierten Simulationsumgebung für einen 8-Bit-RISC-Mikrocontroller
    GI/ITG Workshop, 2005

  442. Braun, Gerlach, Rosenstiel, Siebenborn, Bringmann
    SystemC-Based Communication and Performance Analysis
    Proceedings of Forum on Design Languages (FDL), 2005

  443. Ganzenmüller, Pinkenburg, Rosenstiel
    SPH2000: A Parallel Object-Oriented Framework for Particle Simulations with SPH*
    Proceedings of Euro-Par 2005, Parallel Processing, 11th International Euro-Par Conference (José C. Cunha, Pedro D. Medeiros (Eds.)), Lecture Notes in Computer Science 3648 Springer 2005, ISBN 3-540-28700-0, 2005

  444. Hipp, Pinkenburg, Holtwick, Kunze, Schäfer, Rosenstiel, Ruder
    Libraries and Methods for Parallel Particle Simulations
    Proceedings of HLRS Stuttgart, 2005

  445. Lettnin, Weiss, Braun, Ruf, Rosenstiel
    Temporal Properties Verification of System Level Design
    Proceedings of NetObjectDays, 2005

  446. Lipsa, Herkersdorf, Rosenstiel, Bringmann, Stechele
    Towards a Framework and a Design Methodology for Autonomic SoC
    Proceedings of ARCS 2005 und ACS 2005

  447. Lysaght, Rosenstiel (Hrsg.)
    New Algorithms, Architectures and Applications for Reconfigurable Computing
    Springer, 2005

  448. Nalla, Weiss, Ruf, Kropf, Rosenstiel
    Parallel Bounded Property Checking with SymC
    Proceedings of GI/ITG/GMM Workshop, 2005

  449. Nalla, Weiss, Peranandam, Ruf, Kropf, Rosenstiel
    Symbolic bounded property checking in parallel
    Elsevier, 2005

  450. Oppold, Schweizer, Kuhn, Rosenstiel, Kanus, Strasser
    Evaluation of Ray Casting on Processor-Like Reconfigurable Architectures
    International Conference on Field Programmable Logic and Applications (FPL), 2005

  451. Perandam, Weiss, Ruf, Kropf, Rosenstiell
    Overlap reduction in symbolic system traversal
    Proceedings of IEEE International High Level Design Validation and Test Workshop (HLDVT), 2005

  452. Qin, Pinkenburg, Rosenstiel
    Parallel Motif Search Using PARSEQ
    Proceedings of the International Conference on Parallel and Distributed Computing and Networks (PDCN), 2005

  453. Schnerr, Bringmann, Rosenstiel
    Cycle Accurate Binary Tanslation for Simulation Acceleration in Rapid Prototyping of SoCs
    Proceedings of Design, Automation and Test in Europe (DATE), 2005

  454. Schröder, Lal, Hinterberger, Bogdan, Hil, Birbaumer, Rosenstiel, Schölkopf
    Robust EEG Channel Selection Across Subjects for Brain Computer Interfaces
    Proceedings of International Conference on Machine Learning (ICML), 2005

  455. Schweizer, Oliveira, Oppold, Kuhn, Rosenstiel
    Evaluation of Temporal-Spatial Voltage Scaling for Processor-Like Reconfigurable Architectures
    Proceedings of the Euro DesignCon, München, 2005

  456. Viehl, Bringmann, Rosenstiel
    Performance Analysis of Sequence Diagrams for SoC Design
    Proceedings of the 2nd UML for SoC-Design Workshop (UML-SoC), 42nd Design Automation Conference (DAC), Pages 55-61, Anaheim, June12, 2005

  457. Weiss, Ruf, Kropf, Rosenstiel
    Efficient and customizable integration of temporal properties into SystemC
    Proceedings of Forum on Design Languages (FDL), 2005

  458. Weiss, Ruf, Kropf, Rosenstiel
    Symbolic model checking and simulation with temporal assertions
    Proceedings of Design, Automation and Test in Europe (DATE), 2005


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